From f417e171cd2d2bd0302c8f420ee97295a165a39c Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 28 Mar 2008 00:26:12 -0600 Subject: [PATCH] OMAP2/3 clock: convert mask_to_shift() to __ffs() In OMAP2/3 clock code, we've used mask_to_shift() to convert bitmasks into shift values, via "ffs(mask) - 1". It turns out that there is already a Linux idiom for this in asm/bitops.h: __ffs(). (Not to be confused with ffs(), of course. You wouldn't do that, would you?) When in Rome, do as the Romans. Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock.c | 18 +++++++----------- arch/arm/mach-omap2/clock.h | 1 - arch/arm/mach-omap2/clock24xx.c | 5 +++-- arch/arm/mach-omap2/clock34xx.c | 4 ++-- 4 files changed, 12 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index f7bddc828ea..5661cb829e0 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -21,6 +21,7 @@ #include #include #include +#include #include @@ -46,11 +47,6 @@ u8 cpu_mask; * Omap2 specific clock functions *-------------------------------------------------------------------------*/ -u8 mask_to_shift(u32 mask) -{ - return ffs(mask) - 1; -} - /** * omap2_init_clksel_parent - set a clksel clk's parent field from the hardware * @clk: OMAP clock struct ptr to use @@ -69,7 +65,7 @@ void omap2_init_clksel_parent(struct clk *clk) return; r = __raw_readl(clk->clksel_reg) & clk->clksel_mask; - r >>= mask_to_shift(clk->clksel_mask); + r >>= __ffs(clk->clksel_mask); for (clks = clk->clksel; clks->parent && !found; clks++) { for (clkr = clks->rates; clkr->div && !found; clkr++) { @@ -108,9 +104,9 @@ u32 omap2_get_dpll_rate(struct clk *clk) dpll = cm_read_reg(dd->mult_div1_reg); dpll_mult = dpll & dd->mult_mask; - dpll_mult >>= mask_to_shift(dd->mult_mask); + dpll_mult >>= __ffs(dd->mult_mask); dpll_div = dpll & dd->div1_mask; - dpll_div >>= mask_to_shift(dd->div1_mask); + dpll_div >>= __ffs(dd->div1_mask); dpll_clk = (long long)clk->parent->rate * dpll_mult; do_div(dpll_clk, dpll_div + 1); @@ -574,7 +570,7 @@ u32 omap2_clksel_get_divisor(struct clk *clk) return 0; field_val = cm_read_reg(div_addr) & field_mask; - field_val >>= mask_to_shift(field_mask); + field_val >>= __ffs(field_mask); return omap2_clksel_to_divisor(clk, field_val); } @@ -598,7 +594,7 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) reg_val = cm_read_reg(div_addr); reg_val &= ~field_mask; - reg_val |= (field_val << mask_to_shift(field_mask)); + reg_val |= (field_val << __ffs(field_mask)); cm_write_reg(reg_val, div_addr); wmb(); @@ -696,7 +692,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) /* Set new source value (previous dividers if any in effect) */ reg_val = __raw_readl(src_addr) & ~field_mask; - reg_val |= (field_val << mask_to_shift(field_mask)); + reg_val |= (field_val << __ffs(field_mask)); __raw_writel(reg_val, src_addr); wmb(); diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index b291f14e11f..d5980a9e09a 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -42,7 +42,6 @@ long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate); int omap2_clksel_set_rate(struct clk *clk, unsigned long rate); u32 omap2_get_dpll_rate(struct clk *clk); int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name); -u8 mask_to_shift(u32 mask); extern u8 cpu_mask; diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index df04d8864c6..c6391b06529 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c @@ -31,6 +31,7 @@ #include #include #include +#include #include "memory.h" #include "clock.h" @@ -224,8 +225,8 @@ static int omap2_reprogram_dpll(struct clk *clk, unsigned long rate) mult = (rate / 1000000); done_rate = CORE_CLK_SRC_DPLL; } - tmpset.cm_clksel1_pll |= (div << mask_to_shift(dd->mult_mask)); - tmpset.cm_clksel1_pll |= (mult << mask_to_shift(dd->div1_mask)); + tmpset.cm_clksel1_pll |= (div << __ffs(dd->mult_mask)); + tmpset.cm_clksel1_pll |= (mult << __ffs(dd->div1_mask)); /* Worst case */ tmpset.base_sdrc_rfr = SDRC_RFR_CTRL_BYPASS; diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 19ae85236d5..c0ea2f47f25 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -22,12 +22,12 @@ #include #include #include - #include #include #include #include +#include #include "memory.h" #include "clock.h" @@ -79,7 +79,7 @@ static void omap3_clkoutx2_recalc(struct clk *clk) WARN_ON(!dd->control_reg || !dd->enable_mask); v = cm_read_reg(dd->control_reg) & dd->enable_mask; - v >>= mask_to_shift(dd->enable_mask); + v >>= __ffs(dd->enable_mask); if (v != DPLL_LOCKED) clk->rate = clk->parent->rate; else -- 2.41.3