From ef49740c0e37ed389e83296e3855f61eee186f06 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 12 Sep 2008 16:25:39 -0700 Subject: [PATCH] ARM: OMAP: Split omap2 cpu detection into 24xx and 34xx specific functions Also add omap_type() to detect between GP/EMU/HS omap, and remove unnecessary variable class. This is to make room for further clean-up of omap processor detection. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/id.c | 86 ++++++++++++++++++++++++++++++++-------- 1 file changed, 70 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index d375ba22d12..04a8e707ef3 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -20,7 +20,6 @@ #include #include -static u32 class; static void __iomem *tap_base; static u16 tap_prod_id; @@ -68,6 +67,27 @@ int omap_chip_is(struct omap_chip_id oci) } EXPORT_SYMBOL(omap_chip_is); +int omap_type(void) +{ + u32 val = 0; + + if (cpu_is_omap24xx()) { + val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); + } else if (cpu_is_omap34xx()) { + val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); + } else { + pr_err("Cannot detect omap type!\n"); + goto out; + } + + val &= OMAP2_DEVICETYPE_MASK; + val >>= 8; + +out: + return val; +} +EXPORT_SYMBOL(omap_type); + static u32 __init read_tap_reg(int reg) { unsigned int regval = 0; @@ -189,7 +209,7 @@ static void __init _set_omap_chip(void) } -void __init omap2_check_revision(void) +void __init omap24xx_check_revision(void) { int i, j; u32 idcode; @@ -218,18 +238,6 @@ void __init omap2_check_revision(void) pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n", prod_id, dev_type); - /* - * Detection for 34xx ES2.0 and above can be done with just - * hawkeye and rev. See TRM 1.5.2 Device Identification. - * Note that rev cannot be used directly as ES1.0 uses value 0. - */ - if (hawkeye == 0xb7ae) { - system_rev = 0x34300000 | ((1 + rev) << 12); - pr_info("OMAP%04x ES2.%i\n", system_rev >> 16, rev); - _set_omap_chip(); - return; - } - /* Check hawkeye ids */ for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { if (hawkeye == omap_ids[i].hawkeye) @@ -264,12 +272,58 @@ void __init omap2_check_revision(void) } +void __init omap34xx_check_revision(void) +{ + u32 idcode; + u32 prod_id; + u16 hawkeye; + u8 rev; + + idcode = read_tap_reg(OMAP_TAP_IDCODE); + prod_id = read_tap_reg(tap_prod_id); + hawkeye = (idcode >> 12) & 0xffff; + rev = (idcode >> 28) & 0x0f; + + /* + * Detection for 34xx ES2.0 and above can be done with just + * hawkeye and rev. See TRM 1.5.2 Device Identification. + * Note that rev cannot be used directly as ES1.0 uses value 0. + */ + if (hawkeye == 0xb7ae) { + system_rev = 0x34300000 | ((1 + rev) << 12); + pr_info("OMAP%04x ES2.%i\n", system_rev >> 16, rev); + _set_omap_chip(); + return; + } +} + +void __init omap2_check_revision(void) +{ + /* + * At this point we have an idea about the processor revision set + * earlier with omap2_set_globals_tap(). + */ + if (cpu_is_omap24xx()) + omap24xx_check_revision(); + else if (cpu_is_omap34xx()) + omap34xx_check_revision(); + else + pr_err("OMAP revision unknown, please fix!\n"); +} + +/* + * Set up things for map_io and processor detection later on. Gets called + * pretty much first thing from board init. For multi-omap, this gets + * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to + * detect the exact revision later on in omap2_detect_revision() once map_io + * is done. + */ void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) { - class = omap2_globals->class; + system_rev = omap2_globals->class; tap_base = omap2_globals->tap; - if (class == 0x3430) + if (cpu_is_omap34xx()) tap_prod_id = 0x0210; else tap_prod_id = 0x0208; -- 2.41.1