From e8bf9d58e793752e77641d53094b7328ddf45996 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 24 Jan 2008 00:31:05 -0800 Subject: [PATCH] ARM: OMAP2: Add omap_ctrl_readb et al Add omap_ctrl_readb et al, and make code us it. Some registers are 8-bit on 24xx and 16-bit on 34xx. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Makefile | 4 +- arch/arm/mach-omap2/board-h4.c | 4 +- arch/arm/mach-omap2/clock34xx.h | 3 +- arch/arm/mach-omap2/control.c | 73 +++++++++++++++++++++++++++++ arch/arm/mach-omap2/control.h | 41 ---------------- arch/arm/mach-omap2/id.c | 4 +- arch/arm/mach-omap2/mux.c | 17 ++++--- arch/arm/mach-omap2/pm.c | 6 +-- arch/arm/plat-omap/common.c | 9 ++-- arch/arm/plat-omap/devices.c | 9 ++-- arch/arm/plat-omap/sram.c | 1 - arch/arm/plat-omap/usb.c | 19 ++++---- include/asm-arm/arch-omap/control.h | 24 +++++++++- 13 files changed, 131 insertions(+), 83 deletions(-) create mode 100644 arch/arm/mach-omap2/control.c delete mode 100644 arch/arm/mach-omap2/control.h diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 5068ecbac44..45b85fc3688 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -3,8 +3,8 @@ # # Common support -obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o \ - serial.o gpmc.o timer-gp.o +obj-y := irq.o id.o io.o sram-fn.o memory.o control.o prcm.o clock.o mux.o \ + devices.o serial.o gpmc.o timer-gp.o # Power Management obj-$(CONFIG_PM) += pm.o sleep.o diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 3daeef9773b..ef91d21c5d8 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -33,6 +33,7 @@ #include #include +#include #include #include #include @@ -47,7 +48,6 @@ #include -#include "control.h" #include <../drivers/media/video/ov9640.h> #define H4_FLASH_CS 0 @@ -272,7 +272,7 @@ static struct platform_device *h4_devices[] __initdata = { /* 2420 Sysboot setup (2430 is different) */ static u32 get_sysboot_value(void) { - return (ctrl_read_reg(OMAP24XX_CONTROL_STATUS) & + return (omap_ctrl_readl(OMAP24XX_CONTROL_STATUS) & (OMAP2_SYSBOOT_5_MASK | OMAP2_SYSBOOT_4_MASK | OMAP2_SYSBOOT_3_MASK | OMAP2_SYSBOOT_2_MASK | OMAP2_SYSBOOT_1_MASK | OMAP2_SYSBOOT_0_MASK)); diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 968433f80e5..b4a1537fae2 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -10,12 +10,13 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK34XX_H #define __ARCH_ARM_MACH_OMAP2_CLOCK34XX_H +#include + #include "clock.h" #include "cm.h" #include "cm_regbits_34xx.h" #include "prm.h" #include "prm_regbits_34xx.h" -#include "control.h" static void omap3_dpll_recalc(struct clk *clk); static void omap3_clkoutx2_recalc(struct clk *clk); diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c new file mode 100644 index 00000000000..17ab129f4d5 --- /dev/null +++ b/arch/arm/mach-omap2/control.c @@ -0,0 +1,73 @@ +/* + * OMAP2/3 System Control Module register access + * + * Copyright (C) 2007 Texas Instruments, Inc. + * Copyright (C) 2007 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#undef DEBUG + +#include + +#include + +#include + +static u32 omap2_ctrl_base; + +#define OMAP_CTRL_REGADDR(reg) (void __iomem *)IO_ADDRESS(omap2_ctrl_base + reg) + +void omap_ctrl_base_set(u32 base) +{ + omap2_ctrl_base = base; +} + +u32 omap_ctrl_base_get(void) +{ + return omap2_ctrl_base; +} + +u8 omap_ctrl_readb(u16 offset) +{ + return __raw_readb(OMAP_CTRL_REGADDR(offset)); +} + +u16 omap_ctrl_readw(u16 offset) +{ + return __raw_readw(OMAP_CTRL_REGADDR(offset)); +} + +u32 omap_ctrl_readl(u16 offset) +{ + return __raw_readl(OMAP_CTRL_REGADDR(offset)); +} + +void omap_ctrl_writeb(u8 val, u16 offset) +{ + pr_debug("omap_ctrl_writeb: writing 0x%0x to 0x%0x\n", val, + (u32)OMAP_CTRL_REGADDR(offset)); + + __raw_writeb(val, OMAP_CTRL_REGADDR(offset)); +} + +void omap_ctrl_writew(u16 val, u16 offset) +{ + pr_debug("omap_ctrl_writew: writing 0x%0x to 0x%0x\n", val, + (u32)OMAP_CTRL_REGADDR(offset)); + + __raw_writew(val, OMAP_CTRL_REGADDR(offset)); +} + +void omap_ctrl_writel(u32 val, u16 offset) +{ + pr_debug("omap_ctrl_writel: writing 0x%0x to 0x%0x\n", val, + (u32)OMAP_CTRL_REGADDR(offset)); + + __raw_writel(val, OMAP_CTRL_REGADDR(offset)); +} + diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h deleted file mode 100644 index 81fc96b7d2b..00000000000 --- a/arch/arm/mach-omap2/control.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H -#define __ARCH_ARM_MACH_OMAP2_CONTROL_H - -/* - * OMAP2/3 System Control Module register definitions - * - * Copyright (C) 2007 Texas Instruments, Inc. - * Copyright (C) 2007 Nokia Corporation - * - * Written by Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#undef DEBUG - -#include -#include - -extern unsigned long omap2_ctrl_base; - -#define OMAP_CTRL_REGADDR(reg) (void __iomem *)IO_ADDRESS(omap2_ctrl_base + reg) - - -/* Control global register get/set */ - -static void __attribute__((unused)) ctrl_write_reg(u32 val, u16 reg) -{ - pr_debug("ctrl_write_reg: writing 0x%0x to 0x%0x\n", val, - (u32)OMAP_CTRL_REGADDR(reg)); - - __raw_writel(val, OMAP_CTRL_REGADDR(reg)); -} - -static u32 __attribute__((unused)) ctrl_read_reg(u16 reg) -{ - return __raw_readl(OMAP_CTRL_REGADDR(reg)); -} - -#endif /* __ARCH_ARM_MACH_OMAP2_CONTROL_H */ diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index beb9d9d17e0..a2109c1b8b1 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -17,7 +17,7 @@ #include -#include "control.h" +#include #if defined(CONFIG_ARCH_OMAP2420) #define TAP_BASE io_p2v(0x48014000) @@ -182,7 +182,7 @@ void __init omap2_check_revision(void) printk(KERN_ERR "id: unknown CPU type\n"); BUG(); } - ctrl_status = ctrl_read_reg(i); + ctrl_status = omap_ctrl_readl(i); system_rev |= (ctrl_status & (OMAP2_SYSBOOT_5_MASK | OMAP2_SYSBOOT_4_MASK | OMAP2_SYSBOOT_3_MASK | diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index f3cdcf0fa97..fa86281be94 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -29,10 +29,9 @@ #include #include +#include #include -#include "control.h" - #ifdef CONFIG_OMAP_MUX static struct omap_mux_cfg arch_mux_cfg; @@ -226,13 +225,13 @@ MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1) #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg) { - u8 orig; + u16 orig; u8 warn = 0, debug = 0; if (cpu_is_omap24xx()) - orig = omap_readb(omap2_ctrl_base + cfg->mux_reg); + orig = omap_ctrl_readb(cfg->mux_reg); else - orig = omap_readw(omap2_ctrl_base + cfg->mux_reg); + orig = omap_ctrl_readw(cfg->mux_reg); #ifdef CONFIG_OMAP_MUX_DEBUG debug = cfg->debug; @@ -240,15 +239,15 @@ void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg) warn = (orig != reg); if (debug || warn) printk(KERN_WARNING - "MUX: setup %s (0x%08lx): 0x%02x -> 0x%02x\n", - cfg->name, omap2_ctrl_base + cfg->mux_reg, orig, reg); + "MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n", + cfg->name, omap_ctrl_base_get() + cfg->mux_reg, + orig, reg); } #else #define omap2_cfg_debug(x, y) do {} while (0) #endif #ifdef CONFIG_ARCH_OMAP24XX -/* REVISIT: Convert this code to use ctrl_{read,write}_reg */ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) { static DEFINE_SPINLOCK(mux_spin_lock); @@ -262,7 +261,7 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) if (cfg->pu_pd_val) reg |= OMAP24XX_PULL_UP; omap2_cfg_debug(cfg, reg); - omap_writeb(reg, omap2_ctrl_base + cfg->mux_reg); + omap_ctrl_writeb(reg, cfg->mux_reg); spin_unlock_irqrestore(&mux_spin_lock, flags); return 0; diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index d7f2fa0845f..c0f757a00af 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -39,6 +39,7 @@ #include #include #include +#include #include #include #include @@ -50,7 +51,6 @@ #include "cm.h" #include "cm_regbits_24xx.h" #include "sdrc.h" -#include "control.h" /* These addrs are in assembly language code to be patched at runtime */ extern void *omap2_ocs_sdrc_power; @@ -413,8 +413,8 @@ static void omap2_enter_full_retention(void) MPU_MOD, PM_PWSTCTRL); /* Workaround to kill USB */ - l = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL; - ctrl_write_reg(l, OMAP2_CONTROL_DEVCONF0); + l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL; + omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0); omap2_gpio_prepare_for_retention(); diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index d6041da3337..fd6f329faf2 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -27,6 +27,7 @@ #include #include +#include #include #include @@ -38,8 +39,6 @@ #define NO_LENGTH_CHECK 0xffffffff -u32 omap2_ctrl_base; /* until we have a better place to put it */ - unsigned char omap_bootloader_tag[1024]; int omap_bootloader_tag_len; @@ -267,7 +266,7 @@ void __init omap2_set_globals_242x(void) { omap2_sdrc_base = OMAP2420_SDRC_BASE; omap2_sms_base = OMAP2420_SMS_BASE; - omap2_ctrl_base = OMAP2420_CTRL_BASE; + omap_ctrl_base_set(OMAP2420_CTRL_BASE); } #endif @@ -276,7 +275,7 @@ void __init omap2_set_globals_243x(void) { omap2_sdrc_base = OMAP243X_SDRC_BASE; omap2_sms_base = OMAP243X_SMS_BASE; - omap2_ctrl_base = OMAP243X_CTRL_BASE; + omap_ctrl_base_set(OMAP243X_CTRL_BASE); } #endif @@ -285,7 +284,7 @@ void __init omap2_set_globals_343x(void) { omap2_sdrc_base = OMAP343X_SDRC_BASE; omap2_sms_base = OMAP343X_SMS_BASE; - omap2_ctrl_base = OMAP343X_CTRL_BASE; + omap_ctrl_base_set(OMAP343X_CTRL_BASE); } #endif diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index a16f39ac3e6..ec9a999d0b8 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include @@ -27,10 +28,6 @@ #include #include -#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) -# include "../mach-omap2/control.h" -#endif - #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) static struct dsp_platform_data dsp_pdata = { @@ -284,9 +281,9 @@ static void __init omap_init_mmc(void) * Module Input Clock selection */ if (cpu_is_omap24xx()) { - u32 v = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0); + u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); v |= (1 << 24); /* not used in 243x */ - ctrl_write_reg(v, OMAP2_CONTROL_DEVCONF0); + omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); } } #endif diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 9c9b1019a9f..204cd81b27b 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -31,7 +31,6 @@ # include "../mach-omap2/prm.h" # include "../mach-omap2/cm.h" # include "../mach-omap2/sdrc.h" -# include "../mach-omap2/control.h" #endif #define OMAP1_SRAM_PA 0x20000000 diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index ec9034b4d3e..a619475c4b7 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c @@ -33,12 +33,11 @@ #include #include +#include #include #include #include -#include "../mach-omap2/control.h" - #ifdef CONFIG_ARCH_OMAP1 #define INT_USB_IRQ_GEN IH2_BASE + 20 @@ -116,36 +115,36 @@ static void omap2_usb_devconf_clear(u8 port, u32 mask) { u32 r; - r = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0); + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); r &= ~USBTXWRMODEI(port, mask); - ctrl_write_reg(r, OMAP2_CONTROL_DEVCONF0); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); } static void omap2_usb_devconf_set(u8 port, u32 mask) { u32 r; - r = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0); + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); r |= USBTXWRMODEI(port, mask); - ctrl_write_reg(r, OMAP2_CONTROL_DEVCONF0); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); } static void omap2_usb2_disable_5pinbitll(void) { u32 r; - r = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0); + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI); - ctrl_write_reg(r, OMAP2_CONTROL_DEVCONF0); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); } static void omap2_usb2_enable_5pinunitll(void) { u32 r; - r = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0); + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI; - ctrl_write_reg(r, OMAP2_CONTROL_DEVCONF0); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); } static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) diff --git a/include/asm-arm/arch-omap/control.h b/include/asm-arm/arch-omap/control.h index 27509657b67..4544b2e3c2a 100644 --- a/include/asm-arm/arch-omap/control.h +++ b/include/asm-arm/arch-omap/control.h @@ -36,7 +36,7 @@ #define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 #define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 -/* Control register offsets - read/write with ctrl_{read,write}_reg() */ +/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ #define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10) @@ -162,5 +162,27 @@ #define OMAP2_SYSBOOT_1_MASK (1 << 1) #define OMAP2_SYSBOOT_0_MASK (1 << 0) +#ifndef __ASSEMBLY__ +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) +extern void omap_ctrl_base_set(u32 base); +extern u32 omap_ctrl_base_get(void); +extern u8 omap_ctrl_readb(u16 offset); +extern u16 omap_ctrl_readw(u16 offset); +extern u32 omap_ctrl_readl(u16 offset); +extern void omap_ctrl_writeb(u8 val, u16 offset); +extern void omap_ctrl_writew(u16 val, u16 offset); +extern void omap_ctrl_writel(u32 val, u16 offset); +#else +#define omap_ctrl_base_set(x) WARN_ON(1) +#define omap_ctrl_base_get() 0 +#define omap_ctrl_readb(x) 0 +#define omap_ctrl_readw(x) 0 +#define omap_ctrl_readl(x) 0 +#define omap_ctrl_writeb(x, y) WARN_ON(1) +#define omap_ctrl_writew(x, y) WARN_ON(1) +#define omap_ctrl_writel(x, y) WARN_ON(1) +#endif +#endif /* __ASSEMBLY__ */ + #endif /* __ASM_ARCH_CONTROL_H */ -- 2.41.1