From d8c394c0f1e07d1016b36451e9b1126b09dba5a3 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 22 Jan 2007 10:03:35 +0000 Subject: [PATCH] ARMv7: Add support for the Xenon state saving/restoring Signed-off-by: Catalin Marinas --- arch/arm/kernel/asm-offsets.c | 3 +++ arch/arm/kernel/entry-armv.S | 6 ++++++ arch/arm/mm/Kconfig | 7 +++++++ include/asm-arm/thread_info.h | 3 +++ 4 files changed, 19 insertions(+) diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 3278e713c32..ac29bb9d315 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c @@ -58,6 +58,9 @@ int main(void) DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value)); DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate)); DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate)); +#ifdef CONFIG_ARM_XENON + DEFINE(TI_XENONSTATE, offsetof(struct thread_info, xenonstate)); +#endif #ifdef CONFIG_IWMMXT DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt)); #endif diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index d645897652c..65ae5b76d14 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -583,6 +583,12 @@ ENTRY(__switch_to) add ip, r1, #TI_CPU_SAVE ldr r3, [r2, #TI_TP_VALUE] stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack +#ifdef CONFIG_ARM_XENON + mrc p14, 6, r4, c1, c0, 0 @ current xenon state + ldr r5, [r2, #TI_XENONSTATE] @ value to restore + str r4, [r1, #TI_XENONSTATE] @ save current + mcr p14, 6, r5, c1, c0, 0 @ restore new value +#endif #ifdef CONFIG_MMU ldr r6, [r2, #TI_CPU_DOMAIN] #endif diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index e7904bc92c7..15392220f6e 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -548,6 +548,13 @@ config ARM_THUMB If you don't know what this all is, saying Y is a safe choice. +config ARM_XENON + bool "Enable Xenon extension" + depends on CPU_V7 + help + Say Y here if you have a CPU with Xenon extension and code to make + use of it. Say N for code that can run on CPUs without Xenon. + config CPU_BIG_ENDIAN bool "Build big-endian kernel" depends on ARCH_SUPPORTS_BIG_ENDIAN diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h index eae85b09db2..b0125e60e18 100644 --- a/include/asm-arm/thread_info.h +++ b/include/asm-arm/thread_info.h @@ -63,6 +63,9 @@ struct thread_info { struct crunch_state crunchstate; union fp_state fpstate __attribute__((aligned(8))); union vfp_state vfpstate; +#ifdef CONFIG_ARM_XENON + unsigned long xenonstate; /* Jazelle-X handler base register */ +#endif struct restart_block restart_block; }; -- 2.41.1