From d6daf8d8cc5ccf90247def5551ee9c3e8555e848 Mon Sep 17 00:00:00 2001 From: chandra shekhar Date: Fri, 8 Aug 2008 12:50:18 +0530 Subject: [PATCH] McBSP preamble patch for 34xx support this patch modifies the read write function to do 16/32 bit read write depending on CPU. Signed-off-by: Chandra Shekhar< x0044955@ti.com> Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/mcbsp.c | 23 ++++++++++++++++++++++- include/asm-arm/arch-omap/mcbsp.h | 4 ---- 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index b22c7211297..70944a5c615 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -30,8 +30,29 @@ struct omap_mcbsp **mcbsp_ptr; int omap_mcbsp_count; +void omap_mcbsp_write(u32 io_base, u16 reg, u32 val) +{ + if (cpu_class_is_omap1() || cpu_is_omap2420()) + __raw_writew((u16)val, io_base + reg); + else + __raw_writel(val, io_base + reg); +} + +int omap_mcbsp_read(u32 io_base, u16 reg) +{ + if (cpu_class_is_omap1() || cpu_is_omap2420()) + return __raw_readw(io_base + reg); + else + return __raw_readl(io_base + reg); +} + +#define OMAP_MCBSP_READ(base, reg) \ + omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg) +#define OMAP_MCBSP_WRITE(base, reg, val) \ + omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val) + #define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) -#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; +#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; static void omap_mcbsp_dump_reg(u8 id) { diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h index 2309df0e2da..8fa89c261b5 100644 --- a/include/asm-arm/arch-omap/mcbsp.h +++ b/include/asm-arm/arch-omap/mcbsp.h @@ -139,10 +139,6 @@ #endif -#define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg) -#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg) - - /************************** McBSP SPCR1 bit definitions ***********************/ #define RRST 0x0001 #define RRDY 0x0002 -- 2.41.1