From ac3bf8ad7e1f14f92edfd10f140fcebc77a52018 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Jouni=20H=C3=B6gander?= Date: Fri, 28 Mar 2008 14:57:50 +0200 Subject: [PATCH] 34XX: Fix to use correct shift values for gpio2-6 fclks MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Wrong shift values were used for gpio2-6 fclks (gpt2-6 shift). Signed-off-by: Jouni Högander Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 43da320daff..d00ef1ebfdc 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -2343,7 +2343,7 @@ static struct clk gpio6_fck = { .name = "gpio6_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT6_SHIFT, + .enable_bit = OMAP3430_EN_GPIO6_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2352,7 +2352,7 @@ static struct clk gpio5_fck = { .name = "gpio5_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT5_SHIFT, + .enable_bit = OMAP3430_EN_GPIO5_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2361,7 +2361,7 @@ static struct clk gpio4_fck = { .name = "gpio4_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT4_SHIFT, + .enable_bit = OMAP3430_EN_GPIO4_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2370,7 +2370,7 @@ static struct clk gpio3_fck = { .name = "gpio3_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT3_SHIFT, + .enable_bit = OMAP3430_EN_GPIO3_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2379,7 +2379,7 @@ static struct clk gpio2_fck = { .name = "gpio2_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT2_SHIFT, + .enable_bit = OMAP3430_EN_GPIO2_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; -- 2.41.1