From aa3c182a1dcc069e0bcc65407e569bde43b98c78 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 25 Jan 2008 11:45:29 -0700 Subject: [PATCH] Wait for OMAP3430 clocks to enable before returning from clk_enable() This patch fixes some boot-time instability problems with OMAP3430. The GPTIMER modules can take 200 to 300 microseconds to become available after their clocks are enabled, and without this patch, the clock framework won't wait for them before returning from clk_enable(). If the system attempts to access a GPTIMER register too quickly after the clk_enable(), the system will halt with something similar to the following in the dmtimer code: Unhandled fault: external abort on non-linefetch (0x1028) at 0xd9032010 This is perhaps not the ideal way to solve this problem, but then again, omap2_clk_wait_ready() is perhaps not the ideal way to wait for module readiness. This function is due to be replaced, but in the interim, this patch fixes the issue. Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index f863ab5b454..314ac577a8c 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -203,11 +203,11 @@ static void omap2_clk_wait_ready(struct clk *clk) * it and pull it into struct clk itself somehow. */ reg = clk->enable_reg; - if (reg == OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1) || - reg == OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2)) + if ((((u32)reg & 0xff) >= CM_FCLKEN1) && + (((u32)reg & 0xff) <= OMAP24XX_CM_FCLKEN2)) other_reg = (void __iomem *)(((u32)reg & ~0xf0) | 0x10); /* CM_ICLKEN* */ - else if (reg == OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1) || - reg == OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2)) + else if ((((u32)reg & 0xff) >= CM_ICLKEN1) && + (((u32)reg & 0xff) <= OMAP24XX_CM_ICLKEN4)) other_reg = (void __iomem *)(((u32)reg & ~0xf0) | 0x00); /* CM_FCLKEN* */ else return; -- 2.41.1