From 9d211b761b3cdf7736602ecf7e68f8a298c13278 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Mon, 8 Dec 2008 15:16:49 +0200 Subject: [PATCH] OMAP: Fix dpll4_m4_ck clk_set_rate() This fixes commit e42218d45afbc3e654e289e021e6b80c657b16c2. The commit was based on old kernel tree, and with bad luck applied ok but to wrong position, modifying dpll4_m6_ck instead of dpll4_m4_ck. Signed-off-by: Tomi Valkeinen Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 1c2b49f3274..5357507c413 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -825,6 +825,8 @@ static struct clk dpll4_m4_ck = { PARENT_CONTROLS_CLOCK, .clkdm = { .name = "dpll4_clkdm" }, .recalc = &omap2_clksel_recalc, + .set_rate = &omap2_clksel_set_rate, + .round_rate = &omap2_clksel_round_rate, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ @@ -879,8 +881,6 @@ static struct clk dpll4_m6_ck = { PARENT_CONTROLS_CLOCK, .clkdm = { .name = "dpll4_clkdm" }, .recalc = &omap2_clksel_recalc, - .set_rate = &omap2_clksel_set_rate, - .round_rate = &omap2_clksel_round_rate, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ -- 2.41.1