From 81b669952ed5fe0d6f65f8b9a97d1fdeac93ff10 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 17 Sep 2008 23:24:02 +0900 Subject: [PATCH] sh: Consolidate struct sh_cpuinfo definitions across _32/_64 split. Signed-off-by: Paul Mundt --- arch/sh/include/asm/processor.h | 40 ++++++++++++++++++++++++++++- arch/sh/include/asm/processor_32.h | 19 -------------- arch/sh/include/asm/processor_64.h | 41 ------------------------------ 3 files changed, 39 insertions(+), 61 deletions(-) diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index 58e2be55ab9..693364a20ad 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -3,6 +3,7 @@ #include #include +#include #ifndef __ASSEMBLY__ /* @@ -43,8 +44,45 @@ enum cpu_type { CPU_SH_NONE }; +/* + * TLB information structure + * + * Defined for both I and D tlb, per-processor. + */ +struct tlb_info { + unsigned long long next; + unsigned long long first; + unsigned long long last; + + unsigned int entries; + unsigned int step; + + unsigned long flags; +}; + +struct sh_cpuinfo { + unsigned int type; + int cut_major, cut_minor; + unsigned long loops_per_jiffy; + unsigned long asid_cache; + + struct cache_info icache; /* Primary I-cache */ + struct cache_info dcache; /* Primary D-cache */ + struct cache_info scache; /* Secondary cache */ + + /* TLB info */ + struct tlb_info itlb; + struct tlb_info dtlb; + + unsigned long flags; +} __attribute__ ((aligned(L1_CACHE_BYTES))); + +extern struct sh_cpuinfo cpu_data[]; +#define boot_cpu_data cpu_data[0] +#define current_cpu_data cpu_data[smp_processor_id()] +#define raw_current_cpu_data cpu_data[raw_smp_processor_id()] + /* Forward decl */ -struct sh_cpuinfo; struct seq_operations; extern struct pt_regs fake_swapper_regs; diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index 1cd3a144c85..a46a0207e97 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h @@ -13,7 +13,6 @@ #include #include #include -#include #include /* @@ -27,24 +26,6 @@ #define CCN_CVR 0xff000040 #define CCN_PRR 0xff000044 -struct sh_cpuinfo { - unsigned int type; - int cut_major, cut_minor; - unsigned long loops_per_jiffy; - unsigned long asid_cache; - - struct cache_info icache; /* Primary I-cache */ - struct cache_info dcache; /* Primary D-cache */ - struct cache_info scache; /* Secondary cache */ - - unsigned long flags; -} __attribute__ ((aligned(L1_CACHE_BYTES))); - -extern struct sh_cpuinfo cpu_data[]; -#define boot_cpu_data cpu_data[0] -#define current_cpu_data cpu_data[smp_processor_id()] -#define raw_current_cpu_data cpu_data[raw_smp_processor_id()] - asmlinkage void __init sh_cpu_init(void); /* diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h index ae19839f1d9..b0b4824dfc4 100644 --- a/arch/sh/include/asm/processor_64.h +++ b/arch/sh/include/asm/processor_64.h @@ -17,7 +17,6 @@ #include #include #include -#include #include #include @@ -36,46 +35,6 @@ __asm__("gettr tr0, %1\n\t" \ : "1" (__dummy)); \ pc; }) -/* - * TLB information structure - * - * Defined for both I and D tlb, per-processor. - */ -struct tlb_info { - unsigned long long next; - unsigned long long first; - unsigned long long last; - - unsigned int entries; - unsigned int step; - - unsigned long flags; -}; - -struct sh_cpuinfo { - enum cpu_type type; - unsigned long loops_per_jiffy; - unsigned long asid_cache; - - unsigned int cpu_clock, master_clock, bus_clock, module_clock; - - /* Cache info */ - struct cache_info icache; - struct cache_info dcache; - struct cache_info scache; - - /* TLB info */ - struct tlb_info itlb; - struct tlb_info dtlb; - - unsigned long flags; -}; - -extern struct sh_cpuinfo cpu_data[]; -#define boot_cpu_data cpu_data[0] -#define current_cpu_data cpu_data[smp_processor_id()] -#define raw_current_cpu_data cpu_data[raw_smp_processor_id()] - #endif /* -- 2.41.1