From 7035b44260604a6f464c60ba22aa8bb487022b2c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 21 Jun 2007 04:06:32 -0700 Subject: [PATCH] Revert "ARM: OMAP: Pre-3430 clean-up for dmtimer.c" This reverts commit 95cf80799ced5dca90d54819f9333f098f6701b7. One more time... --- arch/arm/plat-omap/dmtimer.c | 69 +++++++++++++----------------------- 1 file changed, 25 insertions(+), 44 deletions(-) diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 9c517ae9f2f..3856f5aedfc 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -48,7 +48,7 @@ #define OMAP_TIMER_COUNTER_REG 0x28 #define OMAP_TIMER_LOAD_REG 0x2c #define OMAP_TIMER_TRIGGER_REG 0x30 -#define OMAP_TIMER_WRITE_PEND_REG 0x34 +#define OMAP_TIMER_WRITE_PEND_REG 0x34 #define OMAP_TIMER_MATCH_REG 0x38 #define OMAP_TIMER_CAPTURE_REG 0x3c #define OMAP_TIMER_IF_CTRL_REG 0x40 @@ -82,11 +82,8 @@ struct omap_dm_timer { #define omap_dm_clk_enable(x) #define omap_dm_clk_disable(x) -#define omap2_dm_timers NULL -#define omap2_dm_source_names NULL -#define omap2_dm_source_clocks NULL -static struct omap_dm_timer omap1_dm_timers[] = { +static struct omap_dm_timer dm_timers[] = { { .phys_base = 0xfffb1400, .irq = INT_1610_GPTIMER1 }, { .phys_base = 0xfffb1c00, .irq = INT_1610_GPTIMER2 }, { .phys_base = 0xfffb2400, .irq = INT_1610_GPTIMER3 }, @@ -97,15 +94,12 @@ static struct omap_dm_timer omap1_dm_timers[] = { { .phys_base = 0xfffbd400, .irq = INT_1610_GPTIMER8 }, }; -static const int dm_timer_count = ARRAY_SIZE(omap1_dm_timers); - #elif defined(CONFIG_ARCH_OMAP2) -#define omap_dm_clk_enable(x) clk_enable(x) -#define omap_dm_clk_disable(x) clk_disable(x) -#define omap1_dm_timers NULL +#define omap_dm_clk_enable(x) clk_enable(x) +#define omap_dm_clk_disable(x) clk_disable(x) -static struct omap_dm_timer omap2_dm_timers[] = { +static struct omap_dm_timer dm_timers[] = { { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 }, { .phys_base = 0x4802a000, .irq = INT_24XX_GPTIMER2 }, { .phys_base = 0x48078000, .irq = INT_24XX_GPTIMER3 }, @@ -120,15 +114,13 @@ static struct omap_dm_timer omap2_dm_timers[] = { { .phys_base = 0x4808a000, .irq = INT_24XX_GPTIMER12 }, }; -static const char *omap2_dm_source_names[] __initdata = { +static const char *dm_source_names[] = { "sys_ck", "func_32k_ck", - "alt_ck", - NULL + "alt_ck" }; -static struct clk **omap2_dm_source_clocks[3]; -static const int dm_timer_count = ARRAY_SIZE(omap2_dm_timers); +static struct clk *dm_source_clocks[3]; #else @@ -136,10 +128,7 @@ static const int dm_timer_count = ARRAY_SIZE(omap2_dm_timers); #endif -static struct omap_dm_timer *dm_timers; -static char **dm_source_names; -static struct clk **dm_source_clocks; - +static const int dm_timer_count = ARRAY_SIZE(dm_timers); static spinlock_t dm_timer_lock; static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg) @@ -182,7 +171,7 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer) l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG); l |= 0x02 << 3; - if (cpu_class_is_omap2() && (timer == &dm_timers[0])) { + if (cpu_class_is_omap2() && timer == &dm_timers[0]) { /* Enable wake-up only for GPT1 on OMAP2 CPUs*/ l |= 1 << 2; /* Non-posted mode */ @@ -497,7 +486,7 @@ int omap_dm_timers_active(void) return 0; } -int __init omap_dm_timer_init(void) +int omap_dm_timer_init(void) { struct omap_dm_timer *timer; int i; @@ -506,35 +495,27 @@ int __init omap_dm_timer_init(void) return -ENODEV; spin_lock_init(&dm_timer_lock); - - if (cpu_class_is_omap1()) - dm_timers = omap1_dm_timers; - else if (cpu_is_omap24xx()) { - dm_timers = omap2_dm_timers; - dm_source_names = (char **)omap2_dm_source_names; - dm_source_clocks = (struct clk **)omap2_dm_source_clocks; - } - - if (cpu_class_is_omap2()) { - for (i = 0; dm_source_names[i] != NULL; i++) { - dm_source_clocks[i] = clk_get(NULL, dm_source_names[i]); - } +#ifdef CONFIG_ARCH_OMAP2 + for (i = 0; i < ARRAY_SIZE(dm_source_names); i++) { + dm_source_clocks[i] = clk_get(NULL, dm_source_names[i]); + BUG_ON(dm_source_clocks[i] == NULL); } - +#endif if (cpu_is_omap243x()) dm_timers[0].phys_base = 0x49018000; for (i = 0; i < dm_timer_count; i++) { +#ifdef CONFIG_ARCH_OMAP2 + char clk_name[16]; +#endif + timer = &dm_timers[i]; - timer->io_base = (void __iomem *)io_p2v(timer->phys_base); + timer->io_base = (void __iomem *) io_p2v(timer->phys_base); #ifdef CONFIG_ARCH_OMAP2 - if (cpu_class_is_omap2()) { - char clk_name[16]; - sprintf(clk_name, "gpt%d_ick", i + 1); - timer->iclk = clk_get(NULL, clk_name); - sprintf(clk_name, "gpt%d_fck", i + 1); - timer->fclk = clk_get(NULL, clk_name); - } + sprintf(clk_name, "gpt%d_ick", i + 1); + timer->iclk = clk_get(NULL, clk_name); + sprintf(clk_name, "gpt%d_fck", i + 1); + timer->fclk = clk_get(NULL, clk_name); #endif } -- 2.41.1