From 5e7a1f75123fd1cf7c506e67ef410ab3c05901b8 Mon Sep 17 00:00:00 2001 From: Chandra shekhar Date: Mon, 12 Nov 2007 19:16:23 +0530 Subject: [PATCH] mach:omap: some correction in Clock 34XX Resumbmitting the patch earlier sent by girish, after fixing review comments given by paul. This patch modifies the I2C clock nodes as per LDM, corrects usage of DPLL mask and updates the flags of 96M clock nodes Signed-off-by: Chandra Shekhar Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.c | 1 + arch/arm/mach-omap2/clock34xx.h | 27 ++++++++++++++++++--------- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index ae038aedea3..4643275bcc6 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -79,6 +79,7 @@ static void omap3_clkoutx2_recalc(struct clk *clk) WARN_ON(!dd->control_reg || !dd->enable_mask); v = cm_read_reg(dd->control_reg) & dd->enable_mask; + v >>= mask_to_shift(dd->enable_mask); if (v != DPLL_LOCKED) clk->rate = clk->parent->rate; else diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 040b0f152a2..8fd46d4fb7f 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -437,14 +437,16 @@ static struct clk dpll4_m2x2_ck = { static struct clk omap_96m_alwon_fck = { .name = "omap_96m_alwon_fck", .parent = &dpll4_m2x2_ck, - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; static struct clk omap_96m_fck = { .name = "omap_96m_fck", .parent = &omap_96m_alwon_fck, - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; @@ -830,7 +832,8 @@ static struct clk gpt11_fck = { static struct clk core_96m_fck = { .name = "core_96m_fck", .parent = &omap_96m_fck, - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; @@ -862,7 +865,8 @@ static struct clk mmc1_fck = { }; static struct clk i2c3_fck = { - .name = "i2c3_fck", + .name = "i2c_fck", + .id = 3, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C3_SHIFT, @@ -871,7 +875,8 @@ static struct clk i2c3_fck = { }; static struct clk i2c2_fck = { - .name = "i2c2_fck", + .name = "i2c_fck", + .id = 2, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C2_SHIFT, @@ -880,7 +885,8 @@ static struct clk i2c2_fck = { }; static struct clk i2c1_fck = { - .name = "i2c1_fck", + .name = "i2c_fck", + .id = 1, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C1_SHIFT, @@ -1222,7 +1228,8 @@ static struct clk mcspi1_ick = { }; static struct clk i2c3_ick = { - .name = "i2c3_ick", + .name = "i2c_ick", + .id = 3, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C3_SHIFT, @@ -1231,7 +1238,8 @@ static struct clk i2c3_ick = { }; static struct clk i2c2_ick = { - .name = "i2c2_ick", + .name = "i2c_ick", + .id = 2, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C2_SHIFT, @@ -1240,7 +1248,8 @@ static struct clk i2c2_ick = { }; static struct clk i2c1_ick = { - .name = "i2c1_ick", + .name = "i2c_ick", + .id = 1, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C1_SHIFT, -- 2.41.1