]> pilppa.com Git - linux-2.6-omap-h63xx.git/commit
OMAP3 clock: put DPLL into bypass if bypass rate = clk->rate, not hardware rate
authorPaul Walmsley <paul@pwsan.com>
Thu, 25 Sep 2008 14:38:46 +0000 (08:38 -0600)
committerTony Lindgren <tony@atomide.com>
Fri, 3 Oct 2008 13:44:57 +0000 (16:44 +0300)
commit8b1f0bd44fe490ec631230c8c040753a2bda8caa
tree91972119516565c5b5806ce8e2196e62a767e9e6
parente9ea612457bbf244d1a6fc38b08453d5a4ec7bf6
OMAP3 clock: put DPLL into bypass if bypass rate = clk->rate, not hardware rate

When a non-CORE DPLL is enabled via omap3_noncore_dpll_enable(), use
the user's desired rate in clk->rate to determine whether to put the
DPLL into bypass or lock mode, rather than reading the DPLL's current
idle state from its hardware registers.

This fixes a bug observed when leaving retention. Non-CORE DPLLs were
not being relocked when downstream clocks re-enabled; rather, the DPLL
entered bypass mode.

Problem reported by Tero Kristo <tero.kristo@nokia.com>.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/clock34xx.c