This moves the pci_bus class device to be a real struct device and at
the same time, place it in the device tree in the correct location.
Note, the old "bridge" symlink is now gone, but this was a non-standard
link and no userspace program used it. If you need to determine the
device that the bus is on, follow the standard device symlink, or walk
up the device tree.
Shaohua Li [Thu, 24 Jan 2008 02:21:57 +0000 (10:21 +0800)]
PCI: PCIE ASPM support
PCI Express ASPM defines a protocol for PCI Express components in the D0
state to reduce Link power by placing their Links into a low power state
and instructing the other end of the Link to do likewise. This
capability allows hardware-autonomous, dynamic Link power reduction
beyond what is achievable by software-only controlled power management.
However, The device should be configured by software appropriately.
Enabling ASPM will save power, but will introduce device latency.
This patch adds ASPM support in Linux. It introduces a global policy for
ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control
it. The interface can be used as a boot option too. Currently we have
below setting:
-default, BIOS default setting
-powersave, highest power saving mode, enable all available ASPM
state
and clock power management
-performance, highest performance, disable ASPM and clock power
management
By default, the 'default' policy is used currently.
In my test, power difference between powersave mode and performance mode
is about 1.3w in a system with 3 PCIE links.
Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Ian Abbott [Fri, 25 Jan 2008 16:23:56 +0000 (16:23 +0000)]
PCI: Fix fakephp deadlock
If the fakephp driver is used to emulate removal of a PCI device by
writing text string "0" to the "power" sysfs attribute file, this causes
its parent directory and its contents (including the "power" file) to be
deleted before the write operation returns. Unfortunately, it ends up
in a deadlock waiting for itself to complete.
The deadlock is as follows: sysfs_write_file calls flush_write_buffer
which calls sysfs_get_active_two before calling power_write_file in
pci_hotplug_core.c via the sysfs store operation. The power_write_file
function calls disable_slot in fakephp.c via the slot operation. The
disable_slot function calls remove_slot which calls pci_hp_deregister
(back in pci_hotplug_core.c) which calls fs_remove_slot which calls
sysfs_remove_file to remove the "power" file. The sysfs_remove_file
function calls sysfs_hash_and_remove which calls sysfs_addrm_finish
which calls sysfs_deactivate. The sysfs_deactivate function sees that
something has an active reference on the sysfs_dirent (from the
previous call to sysfs_get_active_two back up the call stack somewhere)
so waits for the active reference to go away, which is of course
impossible.
The problem has been present since 2.6.21.
This patch breaks the deadlock by queuing work queue items on a single-
threaded work queue to remove a slot from sysfs, and to rescan the PCI
buses. There is also some protection against disabling a slot that is
already being removed.
Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Shane Huang [Fri, 25 Jan 2008 06:46:24 +0000 (15:46 +0900)]
PCI: modify SB700 SATA MSI quirk
SB700 SATA MSI bug will be fixed in SB700 revision A21 at hardware
level, but the SB700 revision older than A21 will also be found in the
market. This patch modify the original quirk commit bc38b411fe696fad32b261f492cb4afbf1835256 instead of withdrawing it.
The patch also removes quirk to 0x4395 because 0x4395 is SB800 device
ID.
Andrew Patterson [Wed, 23 Jan 2008 00:18:27 +0000 (17:18 -0700)]
PCI: Run ACPI _OSC method on root bridges only
According to the PCI Firmware Specification Revision 3.0 section 4.5, _OSC
should only be called on a root brdige. Here is the relevant passage: "The
_OSC interface defined in this section applies only to Host Bridge ACPI
devices that originate PCI, PCI-X, or PCI Express hierarchies". Changed the
code to find the parent root bridge of the device and call _OSC on that.
Signed-off-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Andrew Patterson [Wed, 23 Jan 2008 00:18:12 +0000 (17:18 -0700)]
PCI ACPI: Added a function to register _OSC with only PCIe devices.
The function pci_osc_support_set() traverses every root bridge when
checking for _OSC support for a capability. It quits as soon as it finds a
device/bridge that doesn't support the requested capability. This won't
work for systems that have mixed PCI and PCIe bridges when checking for
PCIe features. I split this function into two -- pci_osc_support_set() and
pcie_osc_support_set(). The latter is used when only PCIe devices should be
traversed.
Signed-off-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Kenji Kaneshige [Thu, 20 Dec 2007 10:46:33 +0000 (19:46 +0900)]
pciehp: block new requests from the device before power off
Disable Bus Master, SERR# and INTx to ensure that no new Requests will
be generated from the device before turning power off, in accordance
with the specification.
Kenji Kaneshige [Thu, 20 Dec 2007 10:45:09 +0000 (19:45 +0900)]
pciehp: workaround against Bad DLLP during power off
Set Bad DLLP Mask bit in Correctable Error Mask Register during
turning power off the slot.
This is the workaround against Bad DLLP error that sometimes happen
during turning power off on the slot which conforms to PCI Express
1.0a spec. The cause of this error seems that PCI Express 1.0a spec
doesn't have the following consideration that was added to PCI Express
1.1 spec.
"If the port is associated with a hot-pluggable slot (Hot-Plug
Capable bit in the Slot Capabilities register set to 1b), and
Power Controller Control bit in Slot Control register is 1b(Off),
then any transition to DL Inactive must not be considered an
error."
This patch converts users of pci_enable_device_bars() to the new
pci_enable_device_{io,mem} interface.
The new API fits nicely, except maybe for the QLA case where a bit of
code re-organization might be a good idea but I prefer sticking to the
simple patch as I don't have hardware to test on.
I'll also need some feedback on the cs5520 change.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The pci_enable_device_bars() interface isn't well suited to PCI
because you can't actually enable/disable BARs individually on
a device. So for example, if a device has 2 memory BARs 0 and 1,
and one of them (let's say 1) has not been successfully allocated
by the firmware or the kernel, then enabling memory decoding
shouldn't be permitted for the entire device since it will decode
whatever random address is still in that BAR 1.
So a device must be either fully enabled for IO, for Memory, or
for both. Not on a per-BAR basis.
This provides two new functions, pci_enable_device_io() and
pci_enable_device_mem() to replace pci_enable_device_bars(). The
implementation internally builds a BAR mask in order to be able
to use existing arch infrastructure.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
I made the MSI disable messages a little more consistent:
- always use "disabled", not "deactivated"
- specify "device MSI disabled" or "subordinate MSI disabled" when
disabling MSI for only a specific device or subordinate bus
The address is superfluous because sprint_symbol() includes the
address if the symbol lookup fails, but this is the same style used
in do_initcalls() and pnp_fixup_device().
Ivan Kokshaysky [Mon, 17 Dec 2007 21:39:27 +0000 (00:39 +0300)]
PCI: fix for quirk_e100_interrupt()
Check that the e100 is in the D0 power state. If it's not, it won't
respond to MMIO accesses and we end up with master-abort machine
checks on some platforms.
Adrian Bunk [Thu, 13 Dec 2007 18:45:17 +0000 (19:45 +0100)]
PCI: Kconfig help: don't refer to the PCI-HOWTO
A HOWTO that hasn't been updated for half a dozen years no longer
"contains valuable information about which PCI hardware does work under
Linux and which doesn't".
Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Adrian Bunk [Tue, 11 Dec 2007 22:19:41 +0000 (23:19 +0100)]
PCI: drivers/pci/msi.c: move arch hooks to the top
This patch fixes the following problem present with older gcc versions:
<-- snip -->
...
CC drivers/pci/msi.o
/home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/pci/msi.c:692: warning: weak declaration of `arch_msi_check_device' after first use results in unspecified behavior
/home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/pci/msi.c:704: warning: weak declaration of `arch_setup_msi_irqs' after first use results in unspecified behavior
/home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/pci/msi.c:724: warning: weak declaration of `arch_teardown_msi_irqs' after first use results in unspecified behavior
...
<-- snip -->
Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
PCI: Fix bus resource assignment on 32 bits with 64b resources
The current pci_assign_unassigned_resources() code doesn't work properly
on 32 bits platforms with 64 bits resources. The main reason is the use
of unsigned long in various places instead of resource_size_t.
This is a pre-requisite for making powerpc use the generic code instead of
its own half-useful implementation.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Mark Lord [Wed, 21 Nov 2007 23:07:55 +0000 (15:07 -0800)]
PCIe: fix double initialization bug
Earlier patches to split out the hardware init for PCIe hotplug resulted in
some one-time initializations being redone on every resume cycle. Eg.
irq/polling initialization.
This patch splits the hardware init into two parts, and separates the
one-time initializations from those so that they only ever get done once,
as intended.
Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Mark Lord [Wed, 28 Nov 2007 23:12:00 +0000 (15:12 -0800)]
PCIE: Make use of the previously split out pcie_init_enable_events() function
Make use of the previously split out pcie_init_enable_events() function
to reinitialize the hotplug hardware on resume from suspend, but only
when pciehp_force==1. Otherwise behaviour is unmodified.
Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Theodore Ts'o <tytso@mit.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Mark Lord [Wed, 28 Nov 2007 23:11:46 +0000 (15:11 -0800)]
PCI: more fixes for PCIe Hotplug so that it works with ExpressCard slots on Dell notebooks (and others?) in conjunction with modparam of pciehp_force=1
Split out the hotplug hardware initialization code from pcie_init()
into pcie_init_enable_events(), without changing any functionality.
Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Theodore Ts'o <tytso@mit.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Linas Vepstas [Wed, 7 Nov 2007 21:43:59 +0000 (15:43 -0600)]
PCI: export pci_restore_msi_state()
PCI error recovery usually involves the PCI adapter being reset.
If the device is using MSI, the reset will cause the MSI state
to be lost; the device driver needs to restore the MSI state.
The pci_restore_msi_state() routine is currently protected
by CONFIG_PM; remove this, and also export the symbol, so
that it can be used in a modle.
Linas Vepstas [Mon, 26 Nov 2007 07:51:37 +0000 (23:51 -0800)]
pci hotplug: fix rpaphp directory naming
Fix presentation of the slot number in the /sys/bus/pci/slots
directory to match that used in the majority of other drivers.
> Greg said:
> How is anyone supposed to write sane managability tools in the
> presence
> of such anarchy?
>
> > ~ # cat /sys/bus/pci/slots/0000:00:02.2/phy_location
> > U787A.001.DNZ00Z5-P1-C2
>
> Right. This should look like:
>
> # cat /sys/bus/pci/slots/U787A.001.DNZ00Z5-P1-C2/address
> 0000:00:02
This patch implements exactly what you describe. Boot tested.
I assume you really mean it -- if so, then please review and
ack the patch !?
I have absolutely no clue if this breaks any existing IBM tools.
I'm pretty sure it doesn't ... but attention Mike Strosaker! does it?
Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Cc: <strosake@us.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Jean Delvare [Wed, 21 Nov 2007 17:29:06 +0000 (18:29 +0100)]
PCI: Unhide the SMBus on the HP xw4100
Unhide the SMBus on the HP xw4100. This gives access to a hardware
monitoring chip (ADT7463) and to the memory module SPD EEPROMs. I
checked that ACPI wasn't accessing the SMBus, so it should be safe.
Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Fenghua Yu [Wed, 21 Nov 2007 23:07:14 +0000 (15:07 -0800)]
PCI: More Sanity checks for DMAR
Add and changes a few sanity checks in dmar.c.
1. The haw field in ACPI DMAR table in VT-d spec doesn't describe the
range of haw. But since DMA page size is 4KB in DMA remapping, haw
should be at least 4KB. The current VT-d code in dmar.c returns failure
when haw==0. This sanity check is not accurate and execution can pass
when haw is less than one page size 4KB. This patch changes the haw
sanity check to validate if haw is less than 4KB.
2. Add dmar_rmrr_units verification.
3. Add parse_dmar_table() verification.
[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Acked-by: mark gross <mgross@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diego Woitasen [Wed, 21 Nov 2007 23:07:08 +0000 (15:07 -0800)]
PCI: remove unneeded lock_kernel() in drivers/pci/syscall.c.
sys_pciconfig_{read,write}() are protected against PCI removal with the
reference count in struct pci_dev. The concurrency of
pci_user_{read,write}_config_* functions are already protected by pci_lock
in drivers/pci/access.c.
Signed-off-by: Diego Woitasen <diego@woitasen.com.ar> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
PCI: get rid of pci_dev::{vendor,device}_compatible fields
The vendor_compatible and device_compatible fields in struct pci_dev aren't
used anywhere, and are somewhat pointless. Assuming that these are
historical artifacts, remove them.
Lee Schermerhorn [Wed, 21 Nov 2007 23:07:05 +0000 (15:07 -0800)]
PCI: Mem Policy: fix mempolicy usage in pci driver
In an attempt to ensure memory allocation from the local node, the pci
driver temporarily replaces the current task's memory policy with the
system default policy. Trying to be a good citizen, the driver then call's
mpol_get() on the new policy. When it's finished probing, it undoes the
'_get by calling mpol_free() [on the system default policy] and then
restores the current task's saved mempolicy.
A couple of issues here:
1) it's never necessary to set a task's mempolicy to the
system default policy in order to get system default
allocation behavior. Simply set the current task's
mempolicy to NULL and allocations will fall back to
system default policy.
2) we should never [need to] call mpol_free() on the system
default policy. [I plan on trapping this with a VM_BUG_ON()
in a subsequent patch.]
This patch removes the calls to mpol_get() and mpol_free()
and uses NULL for the temporary task mempolicy to effect
default allocation behavior.
Signed-off-by: Lee Schermerhorn <lee.schermerhorn@hp.com> Acked-by: Christoph Lameter <clameter@sgi.com> Acked-by: Mel Gorman <mel@csn.ul.ie> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Tim Yamin [Thu, 1 Nov 2007 23:14:54 +0000 (23:14 +0000)]
PCI: VIA CX700 quirk to disable PCI Bus Parking
PCI Bus Parking and PCI Master read caching on the VIA CX700 is buggy and
can lead to problems such as USB2.0 packet loss if a VT6212L controller
is on the PCI bus. It's disabled by default, but some BIOSes turn these
features on and this patch reverts the configuration to the safe defaults.
Signed-off-by: Tim Yamin <tim.yamin@zonbu.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Adrian Bunk [Sat, 27 Oct 2007 01:06:33 +0000 (03:06 +0200)]
PCI: drivers/pci/: remove unused exports
This patch removes the following unused exports:
- remove the following unused EXPORT_SYMBOL's:
- pci-acpi.c: pci_osc_support_set
- proc.c: pci_proc_detach_bus
- remove the following unused EXPORT_SYMBOL_GPL's:
- bus.c: pci_walk_bus
- probe.c: pci_create_bus
- setup-res.c: pci_claim_resource
Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Linus Torvalds [Fri, 1 Feb 2008 10:48:45 +0000 (21:48 +1100)]
Merge branch 'for-linus' of git://git.kernel.dk/linux-2.6-block
* 'for-linus' of git://git.kernel.dk/linux-2.6-block:
block: kill swap_io_context()
as-iosched: fix inconsistent ioc->lock context
ide-cd: fix leftover data BUG
block: make elevator lib checkpatch compliant
cfq-iosched: make checkpatch compliant
block: make core bits checkpatch compliant
block: new end request handling interface should take unsigned byte counts
unexport add_disk_randomness
block/sunvdc.c:print_version() must be __devinit
splice: always updated atime in direct splice
Greg Ungerer [Fri, 1 Feb 2008 07:38:24 +0000 (17:38 +1000)]
m68knommu: fix 528x ColdFire cache settings
Fix problems with the 528x ColdFire CPU cache setup.
Do not cache the flash region (if present), and make the runtime
settings consistent with the init setting.
Problems pointed out by Bernd Buttner <b.buettner@mkc-gmbh.de>
Greg Ungerer [Fri, 1 Feb 2008 07:38:03 +0000 (17:38 +1000)]
m68knommu: create common DMA table for ColdFire CPUs
Move the ColdFire DMA address table into its own file, and out
of each of the different CPU config files. No need to have a copy
of it in each of the config setup files.
Greg Ungerer [Fri, 1 Feb 2008 07:37:56 +0000 (17:37 +1000)]
m68knommu: modify Makefiles to support common coldfire directory
Modify Makefiles to support separate coldfire platform directory.
Currently the common ColdFire CPU family code sits in the
arch/m68knommu/platform/5307 directory. This is confusing, the files
containing this common code are in no way specific to the 5307 ColdFire.
Create an arch/m68knommu/platform/coldfire directory to contain this
common code. Other m68knommu CPU varients do not need use this code
though, so it doesn't make sense to move it to arch/m68knommu/kernel.
Greg Ungerer [Fri, 1 Feb 2008 07:37:46 +0000 (17:37 +1000)]
m68knommu: move ColdFire vectors.c to its own coldfire directory
Move common ColdFire CPU vectors.c to common coldfire platform directory.
Currently the common ColdFire CPU family code sits in the
arch/m68knommu/platform/5307 directory. This is confusing, the files
containing this common code are in no way specific to the 5307 ColdFire.
Create an arch/m68knommu/platform/coldfire directory to contain this
common code. Other m68knommu CPU varients do not need use this code
though, so it doesn't make sense to move it to arch/m68knommu/kernel.
Greg Ungerer [Fri, 1 Feb 2008 07:37:39 +0000 (17:37 +1000)]
m68knommu: move ColdFire timers.c to its own coldfire directory
Move common ColdFire CPU timers.c to common coldfire platform directory.
Currently the common ColdFire CPU family code sits in the
arch/m68knommu/platform/5307 directory. This is confusing, the files
containing this common code are in no way specific to the 5307 ColdFire.
Create an arch/m68knommu/platform/coldfire directory to contain this
common code. Other m68knommu CPU varients do not need use this code
though, so it doesn't make sense to move it to arch/m68knommu/kernel.
Greg Ungerer [Fri, 1 Feb 2008 07:37:36 +0000 (17:37 +1000)]
m68knommu: move ColdFire pit.c to its own coldfire directory
Move common ColdFire CPU pit.c to common coldfire platform directory.
Currently the common ColdFire CPU family code sits in the
arch/m68knommu/platform/5307 directory. This is confusing, the files
containing this common code are in no way specific to the 5307 ColdFire.
Create an arch/m68knommu/platform/coldfire directory to contain this
common code. Other m68knommu CPU varients do not need use this code
though, so it doesn't make sense to move it to arch/m68knommu/kernel.
Greg Ungerer [Fri, 1 Feb 2008 07:37:28 +0000 (17:37 +1000)]
m68knommu: move ColdFire head.S to its own coldfire directory
Move common ColdFire CPU head.S to common coldfire platform directory.
Currently the common ColdFire CPU family code sits in the
arch/m68knommu/platform/5307 directory. This is confusing, the files
containing this common code are in no way specific to the 5307 ColdFire.
Create an arch/m68knommu/platform/coldfire directory to contain this
common code. Other m68knommu CPU varients do not need use this code
though, so it doesn't make sense to move it to arch/m68knommu/kernel.
Greg Ungerer [Fri, 1 Feb 2008 07:37:18 +0000 (17:37 +1000)]
m68knommu: move ColdFire entry.S to its own coldfire directory
Move common ColdFire CPU entry.S to common coldfire platform directory.
Currently the common ColdFire CPU family code sits in the
arch/m68knommu/platform/5307 directory. This is confusing, the files
containing this common code are in no way specific to the 5307 ColdFire.
Create an arch/m68knommu/platform/coldfire directory to contain this
common code. Other m68knommu CPU varients do not need use this code
though, so it doesn't make sense to move it to arch/m68knommu/kernel.
Greg Ungerer [Fri, 1 Feb 2008 07:35:03 +0000 (17:35 +1000)]
m68knommu: platform setup for 5407 ColdFire parts
Switch to platform style configuration for 5407 ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.
Greg Ungerer [Fri, 1 Feb 2008 07:34:58 +0000 (17:34 +1000)]
m68knommu: platform setup for 532x ColdFire parts
Switch to platform style configuration for 532x ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.
Greg Ungerer [Fri, 1 Feb 2008 07:34:40 +0000 (17:34 +1000)]
m68knommu: platform setup for 527x ColdFire parts
Switch to platform style configuration for 527x ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.
Greg Ungerer [Fri, 1 Feb 2008 07:34:55 +0000 (17:34 +1000)]
m68knommu: platform setup for 5307 ColdFire parts
Switch to platform style configuration for 5307 ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.
Greg Ungerer [Fri, 1 Feb 2008 07:34:50 +0000 (17:34 +1000)]
m68knommu: platform setup for 528x ColdFire parts
Switch to platform style configuration for 528x ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.
Greg Ungerer [Fri, 1 Feb 2008 07:34:30 +0000 (17:34 +1000)]
m68knommu: platform setup for 5249 ColdFire parts
Switch to platform style configuration for 5249 ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.
Greg Ungerer [Fri, 1 Feb 2008 07:34:32 +0000 (17:34 +1000)]
m68knommu: platform setup for 5272 ColdFire parts
Switch to platform style configuration for 5272 ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.
Greg Ungerer [Fri, 1 Feb 2008 07:34:10 +0000 (17:34 +1000)]
m68knommu: platform setup for 520x ColdFire parts
Switch to platform style configuration for 520x ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.
Greg Ungerer [Fri, 1 Feb 2008 07:34:15 +0000 (17:34 +1000)]
m68knommu: platform setup for 523x ColdFire parts
Switch to platform style configuration for 523x ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.