David Brownell [Tue, 14 Aug 2007 05:47:13 +0000 (22:47 -0700)]
remove useless/wrong P20_24XX_TSC_IRQ mux
Remove bogus TSC_IRQ pinmux; it's not used, there's no pin
dedicated for touchscreen (or other TSC chip) purposes, and
this doesn't even look right for P20 (0x10b not 0x108, plus
an IRQ would need to be a GPIO i.e. mux 3 not mux 0).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Wed, 15 Aug 2007 09:12:20 +0000 (12:12 +0300)]
musb_hdrc: Stop VBUS draw on usb_gadget_unregister_driver
If musb_gadget_vbus_draw() also toggles a clock like tusb does,
USB clock will stay on after rmmoding a gadget driver. This
can block omap idle states.
Also handle disconnect as b_idle so that musb_gadget_vbus_draw()
gets called.
Tony Lindgren [Tue, 14 Aug 2007 11:28:23 +0000 (04:28 -0700)]
musb_hdrc: Keep tusb osc_ck enabled during idle even in OTG mode
In OTG mode VBUS draw mA can be 8mA which can be less than
musb->min_power. When connected as OTG device, tusb does not
keep osc_ck enabled without this patch.
Kyungmin Park [Mon, 13 Aug 2007 08:58:09 +0000 (01:58 -0700)]
Fix warning in arch/arm/mach-omap2/timer-gp.c
Fix warning in arch/arm/mach-omap2/timer-gp.c
arch/arm/mach-omap2/timer-gp.c: In function `omap2_gp_timer_set_mode':
arch/arm/mach-omap2/timer-gp.c:89: warning: enumeration value
`CLOCK_EVT_MODE_RESUME' not handled in switch
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Dirk Behme [Sun, 12 Aug 2007 07:13:44 +0000 (09:13 +0200)]
ARM: OMAP: Fix warning in plat-omap/mmu.c
Fix warning
arch/arm/plat-omap/mmu.c:1277: warning: initialization from
incompatible pointer type
arch/arm/plat-omap/mmu.c:1278: warning: initialization from
incompatible pointer type
Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP: Adding Support for 2K nand page support for omap2430
Following patches would add support for 2k Page nand with Enabled HW ECC
on omap2430 v4.0. It has been Tested with Micron Nand. The Patch is
against 2.6.22 linux-omap.git tree. As Always all the comments are welcomed.
Signed-off-by: Shahrom Sharif-Kashani <sshahrom@micron.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
When the OMAP patches are applied and the kernel is built for a
non-ARM target, there are a handful of Kconfig warnings due to the use
of OMAP_MCBSP in arch-independent Kconfig files.
This patch simply removes the 'select OMAP_MCBSP' in these
arch-independent files since it is already 'default y' in
arch/arm/plat-omap/Kconfig
Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Trilok Soni [Mon, 6 Aug 2007 15:10:43 +0000 (11:10 -0400)]
ARM: OMAP: Remove unnecessary N800 PM board specific file
From: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br>
Remove unnecessary N800 PM board specific file
- Remove unnecessary arch/arm/mach-omap2/board-n800-pm.c file, according with
Trilok's early patch [1], that moves board-n800-pm.c code to board-n800.c
Signed-off-by: Trilok Soni <soni.trilok@gmail.com> Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br>
Remove unnecessary N800 PM board specific file
Remove unnecessary arch/arm/mach-omap2/board-n800-pm.c file, according
with Trilok's early patch, that moves board-n800-pm.c code to board-n800.c
Signed-off-by: Trilok Soni <soni.trilok@gmail.com> Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:23 +0000 (12:10 -0600)]
omap2 clock: remove fixed rate from mdm_osc_ck
mdm_osc_ck has a preinitialized rate and is marked as RATE_FIXED, but rather
than using omap2_propagate_rate() as its recalc function, which accounts
for RATE_FIXED clocks, it uses omap2_followparent_recalc(), which sets the
rate to the parent clock's rate. After reviewing the 2430 TRM, fix this
inconsistency by removing the fixed rate declarations (TRM says that this
clock is 'typically' 26MHz).
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:22 +0000 (12:10 -0600)]
omap2 clock: add fixed divisor clock code
The rates of some clocks are equal to their parents' rates, divided by some
fixed integer. This contrasts with the existing 'followparent' clocks,
which follow their parents' rates strictly; and the existing 'clksel' clocks,
which follow their parents' rates divided by a runtime-selectable divisor.
Add code to implement these clocks without resorting to specifying a
fixed rate.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:21 +0000 (12:10 -0600)]
omap2 clock: use dedicated omap2_dpll_recalc() for DPLL recalc func
dpll_ck is not a clksel clock, and so it does not really fit well into
omap2_clksel_recalc(). Split off its recalc code into its own function,
omap2_dpll_recalc().
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:19 +0000 (12:10 -0600)]
omap2 clock: Cleanup in clksel-related code; add sys_clkout2 divisor handling
Convert omap2_get_clksel to use void __iomem *. Add
omap2_divisor_to_clksel(), to convert clock divisors into appropriate
register bit field values. Use non-shifted register bit field masks
in clksel code, rather than masks that have been preshifted down to
bit 0 -- this simplifies existing code and facilitates the use of
symbolic constants from the recent PRCM cleanup. Also add code to
properly handle divisors for sys_clkout2 on OMAP2420. Previously
this clock's divisor settings were ignored.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:17 +0000 (12:10 -0600)]
omap2 clock: return -EINVAL if no clock enable code; fix dpll_ck enable
If the clock framework can't figure out how to enable a clock, return
-EINVAL to indicate that the clock cannot be enabled. Previously the
code returned 0, which indicated success.
Also fix the "clock.c: Enable for dpll_ck without enable code" boot
warning by marking dpll_ck as ALWAYS_ENABLED. This is not technically
true, since the DPLL can be bypassed; but since we currently have no
software infrastructure to control it directly, ALWAYS_ENABLED is a
sufficient fiction for dpll_ck.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:15 +0000 (12:10 -0600)]
omap2 clock: convert PARENT_CONTROLS_CLOCK into a clock flag
The clock framework currently uses a magic value in struct clk
.enable_bit to indicate that the clock's parent controls enabling and
disabling the clock. There's no need to use this type of in-band
special value when there's already a good means to indicate binary
clock parameters: the clock flags field. This patch converts the
existing PARENT_CONTROLS_CLOCK code to use a clock flag.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:14 +0000 (12:10 -0600)]
omap2 clock: vlynq_fck is missing clksel divider code
vlynq_fck is a clksel clock. But omap2_clk_set_parent() is missing
the code to divide its parent's rate down appropriately when vlynq_fck
is set to use a core_ck parent.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:11 +0000 (12:10 -0600)]
omap2 clock: move SDRC-related code from clock.c to memory.c
The clock framework contains two functions, omap2_dll_force_needed()
and omap2_reprogram_sdrc(), which are SDRC code, not really clock
code. So, move these functions to memory.c.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:10 +0000 (12:10 -0600)]
omap2 clock: clean up dss2_fck clock flags
dss2_fck is not a fixed-rate clock; its rate is dependent on its parent's
rate. So, drop the .rate assignment and drop the RATE_FIXED clock flag.
It also is a leaf clock - no clocks have it as a parent - so it can't
propagate its rate anywhere. So, drop the RATE_PROPAGATES and fix the
recalc function pointer accordingly.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:09 +0000 (12:10 -0600)]
omap2 clock: get rid of sleep_ck
According to the 2420 TRM rev J, SLEEP_CLK doesn't have any registers
or bits associated with it, so it's outside software control. It's
also a leaf clock - no software-controllable clocks use it as a
parent. There's nothing we can do with it in software. So, drop it.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:06 +0000 (12:10 -0600)]
omap2 clock: vlynq_fck recalc should be clksel, not followparent
vlynq_fck is a clksel clock, so its rate is equal to its parent's
rate, divided by whichever divisor is selected. But its definition in
clock.h specifies omap2_followparent_recalc() as its rate calculation
code, which sets the clock's rate to that of its parent without
accounting for any divisor. Fix to use omap2_clksel_recalc() instead.
omap2_clksel_recalc() is also missing the appropriate special case to
divide the vlynq_fck rate down; add this in.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:05 +0000 (12:10 -0600)]
omap2 clock: fix clksel divisor bug
For clksel clocks, omap2_clk_set_rate() incorrectly divides the parent
clock's rate by the actual bits of the register field, rather than the
translated divisor value. This happens to work for most clksel
clocks, since the register bit fields are equal to the divisor values.
But for some clocks, such as sys_clkout, the code gets the resulting
rate wrong.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:04 +0000 (12:10 -0600)]
omap2 clock: fix incorrect rate calculation for osc_ck, sys_ck
omap2_get_crystal_rate() calculates osc_ck and sys_ck rates
incorrectly. osc_ck runs at the same rate as the external clock
source. Also, sys_ck's rate derives from osc_ck's rate, divided (not
multiplied) by PRCM_CLKSRC_CTRL:SYSCLKDIV.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 2 Aug 2007 18:10:03 +0000 (12:10 -0600)]
omap2 clock: drop meaningless RATE_CKCTLs
Drop the RATE_CKCTL clock flag from iva1_mpu_int_ifck, gfx_ick, ssi_l4_ick,
and dss_ick. These clocks are not source-selectable, which is the practical
meaning of RATE_CKCTL in the 2420 clock framework.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>