Ben Dooks [Thu, 18 Dec 2008 11:26:54 +0000 (12:26 +0100)]
[ARM] 5349/1: VFP: Add PM code to save and restore current VFP state
When CONFIG_PM is selected, the VFP code does not have any handler
installed to deal with either saving the VFP state of the current
task, nor does it do anything to try and restore the VFP after a
resume.
On resume, the VFP will have been reset and the co-processor access
control registers are in an indeterminate state (very probably the
CP10 and CP11 the VFP uses will have been disabled by the ARM core
reset). When this happens, resume will break as soon as it tries to
unfreeze the tasks and restart scheduling.
Add a sys device to allow us to hook the suspend call to save the
current thread state if the thread is using VFP and a resume hook
which restores the CP10/CP11 access and ensures the VFP is disabled
so that the lazy swapping will take place on next access.
Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Ben Dooks [Sun, 14 Dec 2008 22:50:26 +0000 (22:50 +0000)]
[ARM] S3C24A0: Remove duplicate <mach/io.h> file
The commit 39263db7986bf15c753f6847699107bdf5a2e318 added
a default <mach/io.h> implementation which is shared if
needed between all the s3c implementations. Remove the
s3c24a0 version which is the same as this.
Ben Dooks [Tue, 4 Nov 2008 15:29:09 +0000 (15:29 +0000)]
[ARM] S3C24XX: Add fourth UART definition for S3C2443
Add the fourth UART definition for the S3C2443, and at the
same time fixup the problems caused by the enlarging of the
UART array in the previous commits.
Fix the usage of CONFIG_SERIAL_SAMSUNG_UARTS in several places
in the kernel where it had been missed. This finishes fixing a
long standing issue where S3C2443 and S3C64XX could not use the
4th UART
Jonathan Cameron [Fri, 12 Dec 2008 20:43:09 +0000 (20:43 +0000)]
[ARM] pxa: initial support for the Imote2 platform
Changes made as suggested by Eric Miao (including fix to map_io
silly mistake!).
Originally designed by Intel, now sold by Crossbow (www.xbow.com).
Very little actually on board. The patch includes sensors and
similar as found on commonly occurring daughter boards.
Some of the drivers are not in mainline as yet as they are either
part of the IIO subsystem or need a lot of work before submission.
What is the position wrt to putting them in i2c board configs etc?
Support for these boards has been maintained outside the kernel
for a long time, but now that there is a good da9030 pmic driver
available the last major hurdle no longer exists.
All comments welcomed.
The Imote2's big brother (stargate2) will follow once any problems
with this one have been cleaned up and a few bits and bobs have
been added to the da903x driver. Hopefully the cc2420 driver will
get cleaned up and submitted in the not too distant future as
well.
Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Stefan Schmidt [Mon, 8 Dec 2008 14:58:10 +0000 (15:58 +0100)]
[ARM] pxa/ezx: I2C configuration
I2C platform data setups.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Stefan Schmidt [Mon, 8 Dec 2008 14:58:09 +0000 (15:58 +0100)]
[ARM] pxa/ezx: Keypad configuration
Matrix and single key setups for all phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org> Signed-off-by: Antonio Ospite <ospite@studenti.unina.it> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Stefan Schmidt [Mon, 8 Dec 2008 14:58:08 +0000 (15:58 +0100)]
[ARM] pxa/ezx: GPIO configuration
Pin configs for different generations and phones.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Stefan Schmidt [Mon, 8 Dec 2008 14:58:07 +0000 (15:58 +0100)]
[ARM] pxa/ezx: Remove two memory banks fixup
Our bootloader now supports ATAGS_MEM
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Eric Miao [Mon, 8 Dec 2008 10:51:01 +0000 (18:51 +0800)]
[ARM] pxafb: avoid the racing condition in pxafb_smart_thread
fbi->state change shall really be protected by fbi->ctrlr_lock, where
the change is sheltered. There is a possibility that pxafb_smart_thread
will start update the LCD panel when fbi->state == C_ENABLE, while
all other initialization isn't done.
Eric Miao [Mon, 8 Dec 2008 10:46:00 +0000 (18:46 +0800)]
[ARM] pxafb: allow insertion of delay to the smart panel command sequence
Some smart panel requires a delay between command sequences, while PXA
LCD controller didn't provide such one, let's emulate this by software.
A software delay marker can be inserted into the command sequence, once
pxafb_smart_queue() detects this, it flushes the previous commands and
delay for a specified number of milliseconds.
Juergen Beisert [Tue, 16 Dec 2008 10:44:07 +0000 (11:44 +0100)]
i.MX Framebuffer: Use readl/writel instead of direct pointer deref
This patch prepares the current i.MX1 framebuffer driver for usage in the
whole i.MX family. It switches to readl/writel for register accesses.
Also it moves the register definitions to the driver where they belong.
Acked-by: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer [Tue, 16 Dec 2008 10:44:07 +0000 (11:44 +0100)]
i.MX Framebuffer: remove gpio setup function
Remove the gpio mux setup function from i.MX framebuffer driver.
This function is platform specific and thus should be done by
the board setup. As there are currently no in-kernel users
of this driver we do not break anything.
Acked-by: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer [Sun, 23 Nov 2008 16:31:46 +0000 (17:31 +0100)]
pcm038: add driver for static ram
The pcm038 module (phyCORE-i.MX27) comes with a 512 KiB static RAM which
can be battery buffered. Add mtd_ram support and configure the chip select
line, to which the sram is attached.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mxc_gpio_setup_multiple_pins used to take several ALLOC_MODE flags. Most
of them are unused, so simplify the function by removing the flags. Also,
instead of using a confusing MXC_GPIO_ALLOC_MODE_RELEASE flag in a function
having alloc in its name, add a mxc_gpio_release_multiple_pins function.
Ben Dooks [Tue, 2 Dec 2008 19:34:52 +0000 (19:34 +0000)]
[ARM] S3C: Add UART FIFO selection during arch decompression
Add a configuration option to start the UART FIFOs during the
decompressions sequence to improve boot time when the bootloader
fails to enable the UART FIFOs.
For example, the SMDK6410 UBoot 1.1.6 leaves the FIFOs off.
Kyungmin Park [Tue, 25 Nov 2008 08:05:22 +0000 (17:05 +0900)]
[ARM] S3C64XX: Mask the pll values correctly
Correct the PLL field masks to ensure the PLL functions return the
right value.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: improve the description text] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Kyungmin Park [Tue, 25 Nov 2008 07:59:54 +0000 (16:59 +0900)]
[ARM] S3C64XX: Show uncompress messages
Fix the initialisation of the fifo data in the uncompression serial
routines to ensure that if the FIFO is enabled, that the serial output
is not corrupted.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: edit description to add more detail] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Ben Dooks [Fri, 21 Nov 2008 10:36:05 +0000 (10:36 +0000)]
[ARM] S3C: Update time initialisation to fix S3C64XX time problems
The S3C64XX timer is running at the wrong rate due to the
assumptions made in the timer initialisation about the way
the pwm dividers work. This means that time on the S3C64XX
runs twice as fast as it should.
Fix the problem by moving to using the clk framework to setup
the pwm timer clock muxes, as the pwm-clock code has all the
necessary knowledge of how the timer clock inputs are routed.
Ben Dooks [Fri, 21 Nov 2008 10:36:03 +0000 (10:36 +0000)]
[ARM] S3C64XX: Update TCFG for new timer divider settings.
The S3C64XX series has a new TCFG divider setting to allow the clock
directly through, which means that we need to update the pwm-clock
code to cope with this.
Add <mach/pwm-clock.h> containing the specific code to deal with the
TCFG divider settings and provide any other per-arch data that the
pwm-clock driver needs to function.
projects / linux-2.6-omap-h63xx.git / log