Paul Walmsley [Tue, 8 Apr 2008 06:27:27 +0000 (00:27 -0600)]
OMAP2/3 clock: Add non-CORE DPLL rate set code and M,N programming
Add non-CORE DPLL rate set code and M,N programming for OMAP3.
Connect it to OMAP34xx DPLLs 1, 2, 4, 5 via the clock framework.
You may see some warnings on rate sets from the freqsel code. The
table that TI presented in the 3430 TRM Rev F does not cover Fint <
750000, which definitely occurs in practice. However, the lack of this
freqsel case does not appear to impair the DPLL rate change.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Tue, 8 Apr 2008 06:27:26 +0000 (00:27 -0600)]
OMAP2/3 clock: new OMAP2/3 DPLL rate rounding algorithm
This patch adds a new rate rounding algorithm for DPLL clocks on the
OMAP2/3 architecture.
For a desired DPLL target rate, there may be several
multiplier/divider (M, N) values which will generate a sufficiently
close rate. Lower N values result in greater power economy. However,
lower N values can cause the difference between the rounded rate and
the target rate ("rate error") to be larger than it would be with a
higher N. This can cause downstream devices to run more slowly than
they otherwise would.
This DPLL rate rounding algorithm:
- attempts to find the lowest possible N (DPLL divider) to reach the
target_rate (since, according to Richard Woodruff <r-woodruff@ti.com>,
lower N values save more power than higher N values).
- allows developers to set an upper bound on the error between the
rounded rate and the desired target rate ("rate tolerance"), so an
appropriate balance between rate fidelity and power savings can be
set. This maximum rate error tolerance is set via
omap2_set_dpll_rate_tolerance().
- never returns a rounded rate higher than the target rate.
The rate rounding algorithm caches the last rounded M, N, and rate
computation to avoid rounding the rate twice for each clk_set_rate()
call. (This patch does not yet implement set_rate for DPLLs; that
follows in a future patch.)
The algorithm trades execution speed for rate accuracy. It will find
the (M, N) set that results in the least rate error, within a
specified rate tolerance. It does this by evaluating each divider
setting - on OMAP3, this involves 128 steps. Another approach to DPLL
rate rounding would be to bail out as soon as a valid rate is found
within the rate tolerance, which would trade rate accuracy for
execution speed. Alternate implementations welcome.
This code is not yet used by the OMAP24XX DPLL clock, since it
is currently defined as a composite clock, fusing the DPLL M,N and the
M2 output divider. This patch also renames the existing OMAP24xx DPLL
programming functions to highlight that they program both the DPLL and
the DPLL's output multiplier.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Mikko Ylinen [Mon, 7 Apr 2008 11:55:15 +0000 (14:55 +0300)]
I2C: TWL4030: Introduce twl4030 madc driver
Introduce twl4030 madc driver.
Signed-off-by: Mikko Ylinen <mikko.k.ylinen@nokia.com> Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Francisco Alecrim <francisco.alecrim@indt.org.br> Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Acked-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Fri, 4 Apr 2008 01:09:44 +0000 (19:09 -0600)]
OMAP3 clock: 34xx clock: add enable/disable for non-CORE DPLLs
This patch implements enable/disable for non-CORE DPLLs (DPLLs 1, 2,
4, 5) in the OMAP34xx clock framework.
"Enabling" a DPLL in this context means taking the DPLL from off to
lock, off to bypass, or bypass to lock. If the clock's target rate is
set to the DPLL parent's clock rate, the DPLL will go to bypass.
Otherwise, the DPLL will attempt to lock. "Disabling" means going
from bypass or lock to off.
Jouni Högander contributed a fix for _omap3_noncore_dpll_lock().to
bypass the DPLL state test when the DPLL is in autoidle mode.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Fri, 4 Apr 2008 01:09:43 +0000 (19:09 -0600)]
OMAP3 clock: add OMAP3 DPLL autoidle functions
This patch adds support for DPLL autoidle control to the OMAP3 clock
framework. These functions will be used by the noncore DPLL enable
and disable code - this is because, according to the CDP code, the
DPLL autoidle status must be saved and restored across DPLL
lock/bypass/off transitions.
N.B.: the CORE DPLL (DPLL3) has three autoidle mode options, rather
than just two. This code currently does not support the third option,
low-power bypass autoidle.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 3 Apr 2008 22:34:41 +0000 (16:34 -0600)]
PRM/CM: Convert existing code to use PRM/CM RMW functions
Convert existing code that reads, modifies, and writes back CM/PRM
register values to use the rmw functions introduced in the previous
patch. This code should eventually disappear once clockdomain handling
is integrated into the 24xx clock framework.
Also restructure arch/arm/mach-omap2/prcm.c slightly while we
are here.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Thu, 3 Apr 2008 22:34:40 +0000 (16:34 -0600)]
PRM/CM: Add new PRM/CM register bit manipulation functions
This patch implements an idea from Igor Stoppa <igor.stoppa@nokia.com>
from last year. We use functions to modify PRM/CM register bits,
rather than open-coding those operations.
The patch provides functions that do read + AND + OR + write sequences
on CM and PRM registers: {cm,prm}_rmw_reg_bits(), and
{cm,prm}_rmw_mod_reg_bits(). Several convenience functions are then
implemented on top of those functions for setting and clearing bits:
{cm,prm}_{set,clear}_mod_reg_bits().
These functions don't provide any locking; it is expected that the caller
will handle this.
Thanks to Jouni Högander <jouni.hogander@nokia.com> for catching some
embarrassing errors in earlier versions of this code.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adapts the existing driver to use the power IRQ handler. This
patch superseeds any previous version.
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
I2C: TWL4030: Add power button and power IRQ support
The following patch implements power button and IRQ support
for triton2 power block.
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Prevent AIC23 driver Oopsing when no AIC23 is present by moving some of the
initialisation to after the chip is found. There seems to be more that
should be fixed in this driver but with this change it can at least be
compiled into a kernel safely.
Signed-off-by: Andrzej Zaborowski <balrog@zabor.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
[Sorry, the previous patch was a copy/paste mistake, this one should be
better]
I have no access to the docs for this chip but I'm pretty sure the current
address of the two DIDR1 registers is wrong because it's outside the
TUSB-specific register space. The modified address in turn has a good
chance to be correct.
Signed-off-by: Andrzej Zaborowski <balrog@zabor.org> Acked-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Klaus Pedersen [Wed, 2 Apr 2008 08:42:29 +0000 (11:42 +0300)]
I2C: TWL4030 keyboard driver enhancements
While getting trying to get the keyboard driver to accept my
keyboard layout I found and fixed a few bugs.
- Fixed the driver to respect the matrix size and .rep
fields from "struct omap_kp_platform_data"
- Fixed misc. configuration problems.
- Fixed some problems with the interrupt/polling code by
implementing 100% event driven scan handling (there
was a race between the timer and interrupt initiated
calls to twl_4030_kp_scan()).
- Too many interrupts was delivered -> enable "PENDING_DISABLE".
- The controller would hang with keys stuck on -> program
KEYP_TIMEOUT so sensible timeout.
Other enhancements:
- Simple ghost key suppression.
- Support for non-matrix switches. That is switches connected
between GND and a row.
To configure the driver for the non-matrix switches you add the
key as you normally would, but the col-index will have to be the
same value as the col-size.
For example with .cols = 2 and you will use the value "2" for
COL for the two non-matrix switches:
I might have gone too far when fixing the twl4030-keypad.h file,
but I was loosing breath and attention spelling my way through
these 32+ letter identifiers with names like:
OMAP2430/3430 contain an 1.8V-only MMC2 host that is not properly
supported by the current driver. This patch contains changes to
correctly set up this host.
Signed-off-by: Seth Forshee <seth.forshee@gmail.com> Acked-by: Francisco Alecrim <francisco.alecrim@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
Jarkko Lavinen [Mon, 31 Mar 2008 20:06:36 +0000 (16:06 -0400)]
PLAT: OMAP: Add device configuration to support second HSMMC slot on OMAP 2430 and 3430 boards.
This patch adds device configuration to provide second HSMMC slot support
on OMAP 2430 and 3430 boards.
Signed-off-by: Jarkko Lavinen <jarkko.lavinen@nokia.com>
Change CONFIG_ARCH_OMAP24XX by CONFIG_ARCH_OMAP243X macro when this config
is needed only for 2430 boards.
Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Acked-by: Francisco Alecrim <francisco.alecrim@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
Small typo in the patch recently merged to avoid the unused symbol
message for count_partial(). Discussion thread with confirmation of fix at
http://marc.info/?t=120696854400001&r=1&w=2
Merge branch 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/ralf/upstream-linus
* 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/ralf/upstream-linus:
[MIPS] XSS1500: Fix compilation
[MIPS] Bigsur: make defconfig more useful.
[MIPS] Alchemy: work around clock misdetection on early Au1000
[MIPS] Add missing 4KEC TLB refill handler
[MIPS] BCM1480: Fix PCI/HT IO access
[MIPS] Fix the installation condition of MIPS clocksource
[MIPS] Check for GCC r10k-cache-barrier support
[MIPS] I8253: Export i2853_lock to modules.
[MIPS] VPE loader: Check result of memory allocation.
Oliver Schuster [Tue, 1 Apr 2008 15:06:21 +0000 (17:06 +0200)]
[WATCHDOG] Fix it8712f_wdt.c wrong byte order accessing WDT_TIMEOUT
This patch corrects an error in the driver it8712f_wdt. You cannot set
the 16-bit WDT_TIMEOUT access as a 16-bit outw, because the byte
ordering will be wrong. So just do the high 8 bits as a separate
access.
Signed-off-by: Oliver Schuster <olivers137@aol.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Merge branch 'for-linus' of git://git.o-hand.com/linux-rpurdie-leds
* 'for-linus' of git://git.o-hand.com/linux-rpurdie-leds:
leds: Remove incorrect use of preempt_count() from leds-gpio
leds: Fix potential leds-gpio oops
Some time ago it turned out that our suspend code ordering broke some
NVidia-based systems that hung if _PTS was executed with one of the PCI
devices, specifically a USB controller, in a low power state.
Then, it was noticed that the suspend code ordering was not compliant
with ACPI 1.0, although it was compliant with ACPI 2.0 (and later), and
it was argued that the code had to be changed for that reason (ref.
http://bugzilla.kernel.org/show_bug.cgi?id=9528).
So we did, but evidently we did wrong, because it's now turning out that
some systems have been broken by this change. Refs:
http://bugzilla.kernel.org/show_bug.cgi?id=10340
https://bugzilla.novell.com/show_bug.cgi?id=374217#c16
[ I said at that time that something like this might happend, but the
majority of people involved thought that it was improbable due to the
necessity to preserve the compliance of hardware with ACPI 1.0. ]
This actually is a quite serious regression from 2.6.24.
Moreover, the ACPI 1.0 ordering of suspend code introduced another issue
that I have only noticed recently. Namely, if the suspend of one of
devices fails, the already suspended devices will be resumed without
executing _WAK before, which leads to problems on some systems (for
example, in such situations thermal management is broken on my HP
nx6325). Consequently, it also breaks suspend debugging on the affected
systems.
Note also, that the requirement to execute _PTS before suspending
devices does not really make sense, because the device in question may
be put into a low power state at run time for a reason unrelated to a
system-wide suspend.
For the reasons outlined above, the change of the suspend ordering
should be reverted, which is done by the patch below.
[ Felix Möller: "I am the reporter from the original Novell Bug:
I just tried current git head (two hours ago) with the patch (the one
from the beginning of this thread) from Rafael and without it. With
the patch my MacBook does suspend without it does not." ]
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Tested-by: Felix Möller <felix@derklecks.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Mikulas Patocka [Mon, 31 Mar 2008 23:22:45 +0000 (01:22 +0200)]
plip: replace spin_lock_irq with spin_lock_irqsave in irq context
Plip uses spin_lock_irq/spin_unlock_irq in its IRQ handler (called from
parport IRQ handler), the latter enables interrupts without parport
subsystem IRQ handler expecting it.
The bug can be seen if you compile kernel with lock dependency checking
and use plip --- it produces a warning.
This patch changes it to spin_lock_irqsave/spin_lock_irqrestore, so that
it doesn't enable interrupts when already disabled.
Sergei Shtylyov [Thu, 27 Mar 2008 13:09:31 +0000 (16:09 +0300)]
[MIPS] Alchemy: work around clock misdetection on early Au1000
Work around the CPU clock miscalculation on Au1000DA/HA/HB due the
sys_cpupll register being write-only, i.e. actually do what the comment
before cal_r4off() function advertised for years but the code failed at.
This is achieved by just giving user a chance to define the clock
explicitly in the board config. via CONFIG_SOC_AU1000_FREQUENCY option,
defaulting to 396 MHz if the option is not given...
The patch is based on the AMD's big unpublished patch, the issue seems to
be an undocumented errata (or feature :-)...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
- removed check for enable HT-PCI bridges, because some CFE version
init only the needed one and scanning works even with disabled HT
links
- implemented I/O access behind HT PCI busses
- fixed pci_map for IO resource behind PCI bridge
Tested with E100 and Tulip driver.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Input: make sure input interfaces pin parent input devices
Recent driver core change causes references to parent devices being
dropped early, at device_del() time, as opposed to when all children
are freed. This causes oops in evdev with grabbed devices. Take the
reference to the parent input device ourselves to ensure that it
stays around long enough.
David Brownell [Thu, 27 Mar 2008 00:59:02 +0000 (00:59 +0000)]
leds: Remove incorrect use of preempt_count() from leds-gpio
It appears that we can't just check to see if we're in a task
context ... so instead of trying that, just make the relevant
leds always schedule a little worklet.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Richard Woodruff [Mon, 31 Mar 2008 10:48:00 +0000 (13:48 +0300)]
ARM: OMAP: Use posted mode for dmtimer
This patch adds the use of write posting for the timer. Previously, every
write could lock the requestor for almost 3x32KHz cycles. This patch only
synchronizes before writes and reads instead of after them and it does
it on per register basis. Doing it this way there is some chance to hide
some of the sync latency. It also removes some needless reads when
non-posted mode is there. With out this fix the read/writes take almost
2% CPU load @500MHz just waiting on tick timer registers.
Also define new 34xx only registers.
Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Update twl4030's includes. Headers now available under include/linux/i2c.
arch/arm/mach-omap2/board-2430sdp.c:41:34: error: asm/arch/twl4030-rtc.h: No such file or directory
drivers/video/omap/lcd_2430sdp.c:30:30: error: asm/arch/twl4030.h: No such file or directory
Signed-off-by: Francisco Alecrim <francisco.alecrim@indt.org.br> Acked-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Thu, 27 Mar 2008 17:05:30 +0000 (19:05 +0200)]
I2C: Fix twl4030 timeouts on omap3430
For some reason doing a twl4030 write-read cycle can hang the I2C bus
on omap3430. And doing the write and read separately in twl4030_i2c_read()
seems to fix the problem.
Mark Lord [Fri, 28 Mar 2008 23:05:25 +0000 (19:05 -0400)]
fix uevent action-string regression
Mark Lord wrote:
>
> On boot, syslog is flooded with "uevent: unsupported action-string;" messages.
..
> Mar 28 14:43:29 shrimp kernel: tty ptyqd: uevent: unsupported
> action-string; this will be ignored in a future kernel version
> Mar 28 14:43:29 shrimp kernel: tty ptyqe: uevent: unsupported
> action-string; this will be ignored in a future kernel version
> Mar 28 14:43:29 shrimp kernel: tty ptyqf: uevent: unsupported
> action-string; this will be ignored in a future kernel version
> Mar 28 14:43:29 shrimp kernel: tty ptyr0: uevent: unsupported
> action-string; this will be ignored in a future kernel version
..
These messages are a regression compared with 2.6.24, which did not
flood the syslog with them.
The actual underlying problem was introduced in 2.6.23, when somebody
made the string parsing no longer accept nul-terminated strings as a
valid input to store_uevent().
Eg. "add\0" was valid prior to 2.6.23, where the code regressed to
require "add" without the '\0'.
This patch fixes the 2.6.23 / 2.6.24 regressions, by having the code
once again tolerate the trailing '\0', if present.
According to GregKH, this mainly affects older Ubuntu systems, such as
the one I have here that requires this fix.
Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Björn Steinbrink [Sun, 30 Mar 2008 18:42:59 +0000 (20:42 +0200)]
evdev: Release eventual input device grabs when getting disconnected
When getting disconnected we need to release eventual grabs on the
underlying input device as we also release the input device itself.
Otherwise, we would try to release the grab when the client that
requested it closes its handle, accessing the input device which
might already be freed.
Signed-off-by: Björn Steinbrink <B.Steinbrink@gmx.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 30 Mar 2008 21:26:27 +0000 (14:26 -0700)]
Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
libata: ATA_EHI_LPM should be ATA_EH_LPM
pata_sil680: only enable MMIO on Cell blades
projects / linux-2.6-omap-h63xx.git / log