Jarkko Lavinen [Mon, 26 Nov 2007 16:01:38 +0000 (12:01 -0400)]
MMC: OMAP: Modifications at N800 MMC board specific file to work MMC multislot support
Modifications at board-n800-mmc.c and board-n800.c files to work with MMC multislot support.
Signed-off-by: Jarkko Lavinen <jarkko.lavinen@nokia.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
PLAT: OMAP: Modifications at devices.c and mmc.h to use multislot structures
Modifications at arch/arm/plat-omap/devices.c and include/asm-arm/arch-omap/mmc.h
to use multislot structures.
Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Felipe Balbi <felipe.lima@indt.org.br> Signed-off-by: Jarkko Lavinen <jarkko.lavinen@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Jarkko Lavinen [Mon, 26 Nov 2007 16:01:27 +0000 (12:01 -0400)]
MMC: OMAP: Abort stuck commands
When a card is removed while it is being accessed, a command can get stuck so
that no timeout or end of command interrupt ever occurs. The command getting
stuck is almost always CDM12, but also the other commands can get stuck. Catch
a stuck command with a timer and try sending the initiliazation stream until
the controller starts running again and responds with the end of command
status.
Signed-off-by: Jarkko Lavinen <jarkko.lavinen@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Juha Yrjola [Mon, 26 Nov 2007 16:01:22 +0000 (12:01 -0400)]
MMC: OMAP: General cleanup for MMC multislot support
General code cleanup, modifications at some dev_* functions and
other hacks at mmc_omap_irq() for MMC multislot support.
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
Juha Yrjola [Mon, 26 Nov 2007 16:01:18 +0000 (12:01 -0400)]
MMC: OMAP: Power functions modified to MMC multislot support
Modifications at power functions to MMC multislot support. This patch
also move board-specific code out of MMC OMAP driver.
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
Juha Yrjola [Mon, 26 Nov 2007 16:01:13 +0000 (12:01 -0400)]
MMC: OMAP: Fix timeout calculation for MMC multislot support
Fix the data timeout calculation for MMC multislot support.
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Jarkko Lavinen <jarkko.lavinen@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds back MMC cover switch support in a way that
supports multiple slots.
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Jarkko Lavinen <jarkko.lavinen@nokia.com> Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br>
Juha Yrjola [Wed, 28 Nov 2007 01:50:42 +0000 (17:50 -0800)]
OMAP: MMC: Introduce new multislot structure and change driver to use it
Introduce new MMC multislot structure and change driver to use it.
Note that MMC clocking is now enabled in mmc_omap_select_slot()
and disabled in mmc_omap_release_slot().
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Jarkko Lavinen <jarkko.lavinen@nokia.com> Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Wed, 21 Nov 2007 00:16:24 +0000 (17:16 -0700)]
Runtime constants: use runtime-computed system control module base
Create a global variable, omap2_ctrl_base, that is initialized with
the appropriate control module base address at runtime during
architecture initialization. Convert users of the preprocessor define
OMAP2_CTRL_BASE to use the runtime-computed address, and get rid of
OMAP2_CTRL_BASE. Create ctrl_{read,write}_reg() to handle register
access to these functions - these live in a newly-created file,
arch/arm/mach-omap2/control.h. Add the control register defines that
we currently use into a newly-created file,
include/asm-arm/arch-omap/control.h, where they can be imported into
assembly-language code.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Wed, 21 Nov 2007 00:16:23 +0000 (17:16 -0700)]
Runtime constants: use runtime-computed SMS base
Create a global variable, omap2_sms_base, that is initialized with the
appropriate SMS base address at runtime during architecture
initialization. Convert users of the preprocessor define
OMAP2_SMS_BASE to use the runtime-computed address, and get rid of
OMAP2_SMS_BASE. Create sms_{read,write}_reg() to handle register
access to these functions, located in arch/arm/mach-omap2/sdrc.h.
Define the only SMS register that we currently use, SMS_SYSCONFIG, in
include/asm-arm/arch-omap/sdrc.h, so it can be included in assembly
language files.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Wed, 21 Nov 2007 00:16:22 +0000 (17:16 -0700)]
Runtime constants: use runtime-computed SDRC base
Create a global variable, omap2_sdrc_base, that is initialized with
the appropriate SDRC base address at runtime during architecture
initialization. Convert users of the preprocessor define,
OMAP2_SDRC_BASE, to use the runtime-computed address. Create
sdrc_{read,write}_reg() to handle register access to these functions -
these live in a newly-created file, asm/arch/mach-omap2/sdrc.h. Move
the SDRC register definitions into include/asm-arm/arch-omap/sdrc.h,
so they can be included in assembly language files.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the omap2_set_globals_{242x,243x,343x}() functions. These
functions are called early upon boot in the map_io() functions in the
board-specific init files. The functions are currently no-ops. Later
patches augment these functions to set global variables to the base
virtual addresses of OMAP modules. This makes it possible to write
code that can run without modification on multiple OMAP chip
revisions.
The *_set_globals_* functions are added into
arch/arm/plat-omap/common.c. This patch currently only introduces
OMAP2 and OMAP3 functions, but a later patch introduces an
OMAP16XX-specific version, omap1_set_globals_16xx().
Also, while we are here, we get rid of the unused OMAP_L4_BASE define.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Mon, 19 Nov 2007 19:11:43 +0000 (12:11 -0700)]
flush I-cache after omap_sram_push()
This patch implements a suggestion by Richard Woodruff
<r-woodruff2@ti.com>. omap_sram_push() copies executable code into
SRAM memory. Currently this happens before Linux executes anything
from the SRAM, so we don't have to worry about evicting any SRAM lines
from the I-cache. But at some point in the future, the SRAM might be
used more dynamically, adding and removing code while the system is
running. So we should ensure that the I-cache is clean or at
least up-to-date after the copy.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Sat, 17 Nov 2007 00:14:49 +0000 (17:14 -0700)]
Remove unused and broken core_l3_ck clk_get from board-3430sdp.c
board-3430sdp.c tries to clk_get core_l3_ck. This clock doesn't exist
any longer in the current clock34xx.h, so it fails. The code then tries
to fetch the clock's rate, which is also not currently used. This is
dead code, so remove it.
Tested on 3430SDP ES1.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Kevin Hilman [Tue, 13 Nov 2007 22:45:42 +0000 (14:45 -0800)]
ARM: OMAP: Need to enable 32k-sync clock
When CONFIG_OMAP_RESET_CLOCKS=y is enabled on OMAP3, the 32k sync
clock is disabled, resulting in a crash when any access to it is done,
including a sched_clock().
Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Kevin Hilman [Mon, 12 Nov 2007 23:24:03 +0000 (15:24 -0800)]
ARM: OMAP: Move 32k-based sched_clock() to common code
Since 32k timer code is moving to OMAP1 specific dir, move the
32k-based sched_clock() into common code where it is based on the 32k
sync counter and can be used even when using MPU timer.
While moving, change the ticks-to-nsecs conversion to use the helper
functions provided by clocksource.h.
Also removed the unused ticks_to_usec, leaving only ticks_to_nsec.
Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Kevin Hilman [Mon, 12 Nov 2007 23:24:02 +0000 (15:24 -0800)]
ARM: OMAP: re-organize duplicated 32k-timer code
On OMAP2/3, the gp-timer code can be used for a 32kHz timer simply by
setting the source to be the 32k clock instead of sys_clk.
This patch uses the mach-omap2/timer-gp.c code for 32kHz timer on
OMAP2, moving the logic into mach-omap2/timer-gp.c, and not using
plat-omap/timer32k.c which, for OMAP2, is redundant with the timer-gp
code.
Also, if CONFIG_OMAP_32K_TIMER is enabled, the gptimer-based
clocksource is not used. Instead the default 32k sync counter is used
as the clocksource (see the clocksource in plat-omap/common.c.) This
is important for sleep/suspend so there is a valid counter during
sleep. Note that the suspend/sleep code needs fixing to check for
overflows of this counter.
In addition, the OMAP2/3 details are removed from timer32k.c leaving
that with only OMAP1 specifics. A follow-up patch will move it from
plat-omap common code to mach-omap1.
Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Linus Torvalds [Sat, 17 Nov 2007 16:36:10 +0000 (08:36 -0800)]
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86:
x86: simplify "make ARCH=x86" and fix kconfig all.config
x86: reboot fixup for wrap2c board
x86: check boundary in count setup resource
x86: fix reboot with no keyboard attached
x86: add hpet sanity checks
x86: on x86_64, correct reading of PC RTC when update in progress in time_64.c
x86: fix freeze in x86_64 RTC update code in time_64.c
ntp: fix typo that makes sync_cmos_clock erratic
Remove x86 merge artifact from top Makefile
x86: fixup cpu_info array conversion
x86: show cpuinfo only for online CPUs
x86: fix cpu-hotplug regression
x86: ignore the sys_getcpu() tcache parameter
x86: voyager use correct header file name
x86: fix smp init sections
x86: fix voyager_cat_init section
x86: fix bogus memcpy in es7000_check_dsdt()
The general rule are that ARCH= and native architecture takes
precedence over the configuration.
So make ARCH=i386 [whatever] will always build a 32-bit kernel
no matter what the configuration says. The configuration will
be updated to 32-bit if it was configured to 64-bit and the
other way around.
This behaviour is consistent with previous behaviour so no
suprises here.
make ARCH=x86 will per default result in a 32-bit kernel but as
the only ARCH= value x86 allow the user to select between 32-bit
and 64-bit using menuconfig.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Andreas Herrmann <aherrman@arcor.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The general rule are that ARCH= and native architecture
takes precedence over the configuration.
So make ARCH=i386 [whatever] will always build a 32-bit
kernel no matter what the configuration says.
The configuration will be updated to 32-bit if it was
configured to 64-bit and the other way around.
This behaviour is consistent with previous behaviour so
no suprises here.
make ARCH=x86 will per default result in a 32-bit kernel
but as the only ARCH= value x86 allow the user to select
between 32-bit and 64-bit using menuconfig.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Andreas Herrmann <aherrman@arcor.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com>
Yinghai Lu [Sat, 17 Nov 2007 15:27:01 +0000 (16:27 +0100)]
x86: check boundary in count setup resource
need to check info->res_num less than PCI_BUS_NUM_RESOURCES, so
info->bus->resource[info->res_num] = res will not beyond of bus resource
array when acpi returns too many resource entries.
Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: Gary Hade <gary.hade@us.ibm.com> Cc: Len Brown <lenb@kernel.org> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Truxton Fulton [Sat, 17 Nov 2007 15:27:01 +0000 (16:27 +0100)]
x86: fix reboot with no keyboard attached
Attempt to fix http://bugzilla.kernel.org/show_bug.cgi?id=8378
Hiroto Shibuya wrote to tell me that he has a VIA EPIA-EK10000 which
suffers from the reboot problem when no keyboard is attached. My first
patch works for him:
We found that it was necessary to also set the "disable keyboard" flag in
the command byte, as the first patch was doing. The second patch tries to
minimally modify the command byte, but it is not enough.
Please consider this simple one-line patch to help people with low end VIA
motherboards reboot when no keyboard is attached. Hiroto Shibuya has
verified that this works for him (as I no longer have an afflicted
machine).
Additional discussion:
Note that original patch from Truxton DOES
disable keyboard and this has been in main tree since 2.6.14, thus it must have
quite a bit of air time already.
Note that he only mention "System flag" in the description and comment, but
in the code, "disable keyboard" flag is set.
outb(0x14, 0x60); /* set "System flag" */
In 2.6.23, he made a change to read the current byte and then mask the flags,
but along this change, he only set the "System flag" and dropped the setting
of "disable keyboard" flag.
David P. Reed [Thu, 15 Nov 2007 01:14:50 +0000 (20:14 -0500)]
x86: on x86_64, correct reading of PC RTC when update in progress in time_64.c
Correct potentially unstable PC RTC time register reading in time_64.c
Stop the use of an incorrect technique for reading the standard PC RTC
timer, which is documented to "disconnect" time registers from the bus
while updates are in progress. The use of UIP flag while interrupts
are disabled to protect a 244 microsecond window is one of the
Motorola spec sheet's documented ways to read the RTC time registers
reliably.
tglx: removed locking changes from original patch, as they gain nothing
(read_persistent_clock is only called during boot, suspend, resume - so
no hot path affected) and conflict with the paravirt locking scheme
(see 32bit code), which we do not want to complicate for no benefit.
Signed-off-by: David P. Reed <dpreed@reed.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
David P. Reed [Wed, 14 Nov 2007 22:47:35 +0000 (17:47 -0500)]
x86: fix freeze in x86_64 RTC update code in time_64.c
Fix hard freeze on x86_64 when the ntpd service calls
update_persistent_clock()
A repeatable but randomly timed freeze has been happening in Fedora 6
and 7 for the last year, whenever I run the ntpd service on my AMD64x2
HP Pavilion dv9000z laptop. This freeze is due to the use of
spin_lock(&rtc_lock) under the assumption (per a bad comment) that
set_rtc_mmss is called only with interrupts disabled. The call from
ntp.c to update_persistent_clock is made with interrupts enabled.
Signed-off-by: David P. Reed <dpreed@reed.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
David P. Reed [Wed, 14 Nov 2007 22:49:21 +0000 (17:49 -0500)]
ntp: fix typo that makes sync_cmos_clock erratic
Fix a typo in ntp.c that has caused updating of the persistent (RTC)
clock when synced to NTP to behave erratically.
When debugging a freeze that arises on my AMD64 machines when I
run the ntpd service, I added a number of printk's to monitor the
sync_cmos_clock procedure. I discovered that it was not syncing to
cmos RTC every 11 minutes as documented, but instead would keep trying
every second for hours at a time. The reason turned out to be a typo
in sync_cmos_clock, where it attempts to ensure that
update_persistent_clock is called very close to 500 msec. after a 1
second boundary (required by the PC RTC's spec). That typo referred to
"xtime" in one spot, rather than "now", which is derived from "xtime"
but not equal to it. This makes the test erratic, creating a
"coin-flip" that decides when update_persistent_clock is called - when
it is called, which is rarely, it may be at any time during the one
second period, rather than close to 500 msec, so the value written is
needlessly incorrect, too.
Signed-off-by: David P. Reed Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Thomas Gleixner [Sat, 17 Nov 2007 12:18:42 +0000 (13:18 +0100)]
x86: fixup cpu_info array conversion
92cb7612aee39642d109b8d935ad265e602c0563 sets cpu_info->cpu_index to zero
for no reason. Referencing cpu_info->cpu_index now points always to CPU#0,
which is apparently not what we want.
Remove it.
Spotted-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
It can happen that cpuinfo is displayed for CPUs that are not online or
even worse for CPUs not present at all. As an example, following was
shown for a "second" CPU of a single core K8 variant:
In cases where not all CPUs are brought up during
boot (e.g. using maxcpus and additional_cpus parameters)
mce_cpu_callback now returns NOTFIY_BAD because
for such CPUs cpu_data is not completely filled when
the notifier is called. Thus mce_create_device fails right
at its beginning:
if (!mce_available(&cpu_data[cpu]))
return -EIO;
As a quick fix I suggest to check boot_cpu_data for MCE.
To reproduce this regression:
(1) boot with maxcpus=2 addtional_cpus=2 on a 4 CPU x86-64 system
(2) # echo 1 >/sys/devices/system/cpu/cpu2/online
-bash: echo: write error: Invalid argument
dmesg shows:
_cpu_up: attempt to bring up CPU 2 failed
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Ingo Molnar [Wed, 7 Nov 2007 17:37:48 +0000 (18:37 +0100)]
x86: ignore the sys_getcpu() tcache parameter
dont use the vgetcpu tcache - it's causing problems with tasks
migrating, they'll see the old cache up to a jiffy after the
migration, further increasing the costs of the migration.
In the worst case they see a complete bogus information from
the tcache, when a sys_getcpu() call "invalidated" the cache
info by incrementing the jiffies _and_ the cpuid info in the
cache and the following vdso_getcpu() call happens after
vdso_jiffies have been incremented.
Randy Dunlap [Mon, 12 Nov 2007 05:06:02 +0000 (21:06 -0800)]
x86: voyager use correct header file name
Fix header file name for Voyager build.
In file included from arch/x86/kernel/setup_32.c:61:
include/asm-x86/mach-voyager/setup_arch.h:2:26: error: asm/setup_32.h: No such file or directory
make[1]: *** [arch/x86/kernel/setup_32.o] Error 1
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Thomas Gleixner [Wed, 14 Nov 2007 12:20:48 +0000 (13:20 +0100)]
x86: fix bogus memcpy in es7000_check_dsdt()
es7000_check_dst() contains a memcpy from 0, which probably should have been
a memset. Remove it and check the retunr value from acpi_get_table_header.
Noticed by: Joe Perches <joe@perches.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Linus Torvalds [Sat, 17 Nov 2007 02:32:08 +0000 (18:32 -0800)]
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4638/1: pxa: use PXA3xx specific macros to define clks
[ARM] remove useless setting of VM_RESERVED
Reddy, Teerth [Fri, 16 Nov 2007 23:59:53 +0000 (15:59 -0800)]
Watchdog: Fix for the watchdog reset issue on OMAP3
Fix for the watchdog reset defect.The watchdog header file has been modified in the mainline merge due to which the watchdog was not functioning.
OMAP_WATCHDOG_BASE is being added twice so this patch is required for the watchdog to function.
Signed-off-by: Teerth Reddy <teerth@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Choraria, Rohit [Fri, 16 Nov 2007 23:51:26 +0000 (15:51 -0800)]
ARM: OMAP: VMALLOC Size
This patch increases the size of VMALLOC to accommodate the bigger DDR and
NOR flashes being used now. Since SRAM is allocated at the end of VMALLOC
area, moving the SRAM virtual address also.
Signed-off-by: Rohit Choraria <rohitkc@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Kyungmin Park [Fri, 16 Nov 2007 00:36:49 +0000 (09:36 +0900)]
ARM: OMAP: Fix compiler error when I2C_OMAP is not set
Fix compiler error when I2C_OMAP is not set
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Kevin Hilman [Fri, 16 Nov 2007 23:44:18 +0000 (15:44 -0800)]
ARM: OMAP: implement CPUfreq frequency table based on PRCM table
This patch adds a CPUfreq frequency-table implementation for OMAP2 by
walking the PRCM rate-table for available entries and adding them to a
CPUfreq table.
CPUfreq can then be used to manage switching between all the available
entries in the PRCM rate table. Either use the CPUfreq sysfs
interface directly, (see Section 3 of Documentation/cpu-freq/user-guide.txt)
or use the cpufrequtils package:
http://www.kernel.org/pub/linux/utils/kernel/cpufreq/cpufrequtils.html
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Updated to try to use cpufreq_table if it exists.
Eric Paris [Fri, 16 Nov 2007 21:35:56 +0000 (16:35 -0500)]
SELinux: return EOPNOTSUPP not ENOTSUPP
ENOTSUPP is not a valid error code in the kernel (it is defined in some
NFS internal error codes and has been improperly used other places). In
the !CONFIG_SECURITY_SELINUX case though it is possible that we could
return this from selinux_audit_rule_init(). This patch just returns the
userspace valid EOPNOTSUPP.
Signed-off-by: Eric Paris <eparis@redhat.com> Signed-off-by: James Morris <jmorris@namei.org>
Paul Walmsley [Wed, 14 Nov 2007 08:30:15 +0000 (01:30 -0700)]
SRAM patcher: convert omap2_set_prcm to use runtime SRAM patcher
Use the runtime SRAM patcher to set register addresses in
omap2_set_prcm. The long symbol names are intended to help
disambiguate the symbols, now that they are global.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Wed, 14 Nov 2007 08:30:14 +0000 (01:30 -0700)]
SRAM patcher: convert sram_reprogram_sdrc to use runtime SRAM patcher
Use the runtime SRAM patcher to set register addresses in
sram_reprogram_sdrc. The long symbol names are intended to help
disambiguate the symbols, now that they are global.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Wed, 14 Nov 2007 08:30:13 +0000 (01:30 -0700)]
SRAM patcher: convert sram_ddr_init to use runtime SRAM patcher
Use the runtime SRAM patcher to set register addresses in
sram_ddr_init. The long symbol names are intended to help
disambiguate the symbols, now that they are global.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Wed, 14 Nov 2007 08:30:12 +0000 (01:30 -0700)]
SRAM patcher: convert omap24xx_sram_suspend to use runtime SRAM patcher
Use the runtime SRAM patcher to set register addresses in
omap24xx_sram_suspend. The long symbol names are intended to help
disambiguate the symbols, now that they are global.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Paul Walmsley [Wed, 14 Nov 2007 08:30:11 +0000 (01:30 -0700)]
SRAM patcher: add SRAM virtual address patcher
Add omap_sram_patch_va(), which patches a virtual address into SRAM
code at runtime. This will be used in a future patch series to implement
part of multiboot support for OMAP2/3.
If CONFIG_OMAP_DEBUG_SRAM_PATCH is defined (the default), the code
will be very careful to ensure that the target location to patch is
valid. It will only overwrite a location if the location contains a
32-bit magic number, defined as SRAM_VA_MAGIC. Also, defining DEBUG
at the top of the file and enabling CONFIG_DEBUG_LL will log patch
locations and data via printk.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Linus Torvalds [Fri, 16 Nov 2007 00:41:52 +0000 (16:41 -0800)]
dirty page balancing: Get rid of broken unmapped_ratio logic
This code harks back to the days when we didn't count dirty mapped
pages, which led us to try to balance the number of dirty unmapped pages
by how much unmapped memory there was in the system.
That makes no sense any more, since now the dirty counts include the
mapped pages. Not to mention that the math doesn't work with HIGHMEM
machines anyway, and causes the unmapped_ratio to potentially turn
negative (which we do catch thanks to clamping it at a minimum value,
but I mention that as an indication of how broken the code is).
The code also was written at a time when the default dirty ratio was
much larger, and the unmapped_ratio logic effectively capped that large
dirty ratio a bit. Again, we've since lowered the dirty ratio rather
aggressively, further lessening the point of that code.
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Fri, 16 Nov 2007 00:34:00 +0000 (16:34 -0800)]
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
* 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6:
[NETFILTER]: Fix NULL pointer dereference in nf_nat_move_storage()
[SUNHME]: VLAN support for sunhme
[CHELSIO]: Fix skb->dev setting.
[NETFILTER]: fix compat_nf_sockopt typo
[INET]: Fix potential kfree on vmalloc-ed area of request_sock_queue
[VIA_VELOCITY]: Don't oops on MTU change.
iwl4965: fix not correctly dealing with hotunplug
rt2x00: Fix chipset revision validation
iwl3945: place CCK rates in front of OFDM for supported rates
mac80211: Fix queuing of scan containing a SSID
Linus Torvalds [Fri, 16 Nov 2007 00:08:49 +0000 (16:08 -0800)]
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] N32 needs to use the compat version of sys_nfsservctl.
[MIPS] irq_cpu: use handle_percpu_irq handler to avoid dropping interrupts.
[MIPS] Sibyte: Fix name of clocksource.
[MIPS] SNI: s/achknowledge/acknowledge/
[MIPS] Makefile: Fix canonical system names
[MIPS] vpe: handle halting TCs in an errata safe way.
[MIPS] Sibyte: Stop timers before programming next even.
[MIPS] Sibyte: Increase minimum oneshot timer interval to two ticks.
[MIPS] Lasat: Fix overlap of interrupt number ranges.
[MIPS] SNI PCIT CPLUS: workaround for b0rked irq wiring of onboard PCI bus 1
[MIPS] Fix shadow register support.
[MIPS] Change get_cycles to always return 0.
[MIPS] Fix typo in R3000 TRACE_IRQFLAGS code
[MIPS] Sibyte: Replace use of removed IO_SPACE_BASE with IOADDR.
[MIPS] iounmap if in vr41xx_pciu_init() pci clock is over 33MHz
[MIPS] BCM1480: Remove duplicate acknowledge of timer interrupt.
[MIPS] Sibyte: pin timer interrupt to their cores.
[MIPS] Qemu: Add early printk, your friend in a cold night.
[MIPS] Convert reference to mem_map to pfn_to_page().
[MIPS] Sibyte: resurrect old cache hack.
This routine is called each time hash should be replaced, nf_conn has
extension list which contains pointers to connection tracking users
(like nat, which is right now the only such user), so when replace takes
place it should copy own extensions. Loop above checks for own
extension, but tries to move higer-layer one, which can lead to above
oops.
Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
Ralf Baechle [Thu, 15 Nov 2007 19:37:15 +0000 (19:37 +0000)]
[MIPS] irq_cpu: use handle_percpu_irq handler to avoid dropping interrupts.
This matters to any sort of device that is wired to one of the CPU
interrupt pins on an SMP system. Typically the scenario is most easily
triggered with the count/compare timer interrupt where the same interrupt
number and thus irq_desc is used on each processor.
CPU A CPU B
do_IRQ()
generic_handle_irq()
handle_level_irq()
spin_lock(desc_lock)
set IRQ_INPROGRESS
spin_unlock(desc_lock)
do_IRQ()
generic_handle_irq()
handle_level_irq()
spin_lock(desc_lock)
IRQ_INPROGRESS set => bail out
spin_lock(desc_lock)
clear IRQ_INPROGRESS
spin_unlock(desc_lock)
In case of the cp0 compare interrupt this means the interrupt will be
acked and not handled or re-armed on CPU b, so there won't be any timer
interrupt until the count register wraps around.
With kernels 2.6.20 ... 2.6.23 we usually were lucky that things were just
working right on VSMP because the count registers are synchronized on
bootup so it takes something that disables interrupts for a long time on
one processor to trigger this one.
For scenarios where an interrupt is multicasted or broadcasted over several
CPUs the existing code was safe and the fix will break it. There is no
way to know in the interrupt controller code because it is abstracted from
the platform code. I think we do not have such a setup currently, so this
should be ok.
Ralf Baechle [Sun, 11 Nov 2007 17:33:55 +0000 (17:33 +0000)]
[MIPS] Sibyte: Stop timers before programming next even.
We have no guarantee by the generic time code that the timer is stopped
when the ->next_event method is called. Modifying the Timer Initial Count
register while the timer is enabled has UNPREDICTABLE effect according to
the BCM1250/BCM1125/BCM1125H User Manual. So stop the timer before
reprogramming.
This is a paranoia fix; no ill effects have been observed previously.
Ralf Baechle [Sun, 11 Nov 2007 17:24:46 +0000 (17:24 +0000)]
[MIPS] Sibyte: Increase minimum oneshot timer interval to two ticks.
For the old minimum of a single tick a value of zero would be programmed
into the init value register which in the BCM1250/BCM1125/BCM1125H User
Manual in the Timer Special Cases section is documented to have
UNPREDICTABLE effect.
Observable sympthoms of this bug were hangs of several seconds on the
console during bootup and later if both dyntick and highres timer options
were activated.
In theory contiguous mode of the timers is also affected but in an act of
hopeless lack of realism I'll assume nobody will ever configure a KERNEL
for HZ > 500kHz but if so I leave that to evolution to sort out.
Ralf Baechle [Thu, 8 Nov 2007 18:02:29 +0000 (18:02 +0000)]
[MIPS] Fix shadow register support.
Shadow register support would not possibly have worked on multicore
systems. The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.
SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code. So fix
the allocator by ditching it. Move the remaining CPU probe bits into
the generic CPU probe.
Ralf Baechle [Thu, 8 Nov 2007 11:37:47 +0000 (11:37 +0000)]
[MIPS] Change get_cycles to always return 0.
This avoids us executing an mfc0 c0_count instruction on processors which
don't have but also on certain R4000 and R4400 versions where reading from
the count register just in the very moment when its value equals
c0_compare will result in the timer interrupt getting lost.
There is still a number of users of get_cycles remaining outside the
arch code:
crypto/tcrypt.c: start = get_cycles();
crypto/tcrypt.c: end = get_cycles();
crypto/tcrypt.c: start = get_cycles();
crypto/tcrypt.c: end = get_cycles();
crypto/tcrypt.c: start = get_cycles();
crypto/tcrypt.c: end = get_cycles();
drivers/char/hangcheck-timer.c: return get_cycles();
drivers/char/hangcheck-timer.c: printk("Hangcheck: Using get_cycles().\n");
drivers/char/random.c: sample.cycles = get_cycles();
drivers/input/joystick/analog.c:#define GET_TIME(x) do { x = get_cycles(); }
include/linux/arcdevice.h: _x = get_cycles(); \
include/linux/arcdevice.h: _y = get_cycles(); \
mm/slub.c: if (!s->defrag_ratio || get_cycles() % 1024 > s->defrag_ratio)
mm/slub.c: p += 64 + (get_cycles() & 0xff) * sizeof(void *);
Ralf Baechle [Sat, 3 Nov 2007 01:01:37 +0000 (01:01 +0000)]
[MIPS] Sibyte: resurrect old cache hack.
The recent switch of the Sibyte SOCs from the processor specific cache
managment code in c-sb1.c to c-r4k.c lost this old hack
[MIPS] Hack for SB1 cache issues
Removing flush_icache_page a while ago broke SB1 which was using an empty
flush_data_cache_page function. This glues things well enough so a more
efficient but also more intrusive solution can be found later.
Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
in the hope it was no longer needed. As it turns it still is so resurrect
it until there is a better solution.
projects / linux-2.6-omap-h63xx.git / log