From: Roland Dreier Date: Tue, 30 Dec 2008 23:30:26 +0000 (-0800) Subject: IB/mlx4: Fix reading SL field out of cqe->sl_vid X-Git-Tag: v2.6.29-rc1~554^2^2 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=f781a22fa2ec11878a960bc3c2abb0a76f9a8f16;p=linux-2.6-omap-h63xx.git IB/mlx4: Fix reading SL field out of cqe->sl_vid Commit f780a9f1 ("mlx4_core: Add ethernet fields to CQE struct") introduced a bug in how wc->sl is set in mlx4_ib_poll_one() -- since cqe->sl_vid is a big-endian value, the shift must be done after converting to host endianness. This bug was found using sparse endianness checking. Signed-off-by: Roland Dreier --- diff --git a/drivers/infiniband/hw/mlx4/cq.c b/drivers/infiniband/hw/mlx4/cq.c index 8415ecce5c4..a3c5af1d7ec 100644 --- a/drivers/infiniband/hw/mlx4/cq.c +++ b/drivers/infiniband/hw/mlx4/cq.c @@ -699,7 +699,7 @@ repoll: } wc->slid = be16_to_cpu(cqe->rlid); - wc->sl = be16_to_cpu(cqe->sl_vid >> 12); + wc->sl = be16_to_cpu(cqe->sl_vid) >> 12; g_mlpath_rqpn = be32_to_cpu(cqe->g_mlpath_rqpn); wc->src_qp = g_mlpath_rqpn & 0xffffff; wc->dlid_path_bits = (g_mlpath_rqpn >> 24) & 0x7f;