From: Nicolas Pitre <nico@cam.org>
Date: Fri, 27 Mar 2009 18:22:26 +0000 (-0400)
Subject: [ARM] Kirkwood: small L2 code cleanup
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=f000328ac10f23f4841b83ddc60eceb3ba0ac176;p=linux-2.6-omap-h63xx.git

[ARM] Kirkwood: small L2 code cleanup

Strictly speaking, a MCR instruction does not produce any output.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
---

diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 1afed5068c2..6e77c042d8e 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -258,9 +258,7 @@ static void __init enable_dcache(void)
 
 static void __init __invalidate_icache(void)
 {
-	int dummy;
-
-	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : "=r" (dummy));
+	__asm__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
 }
 
 static int __init invalidate_and_disable_icache(void)