From: David Daney <ddaney@caviumnetworks.com>
Date: Thu, 11 Dec 2008 23:33:32 +0000 (-0800)
Subject: MIPS: Add SMP_ICACHE_FLUSH for the Cavium CPU family.
X-Git-Tag: v2.6.29-rc2~104^2~21
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=ddcdb1b4a46915b70dce3af3a78582b3ca79cf76;p=linux-2.6-omap-h63xx.git

MIPS: Add SMP_ICACHE_FLUSH for the Cavium CPU family.

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index 86557b5d1b3..40e5ef1d4d2 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -37,6 +37,9 @@ extern int __cpu_logical_map[NR_CPUS];
 
 #define SMP_RESCHEDULE_YOURSELF	0x1	/* XXX braindead */
 #define SMP_CALL_FUNCTION	0x2
+/* Octeon - Tell another core to flush its icache */
+#define SMP_ICACHE_FLUSH	0x4
+
 
 extern void asmlinkage smp_bootstrap(void);