From: Nicolas Pitre Date: Wed, 21 Dec 2005 17:26:25 +0000 (-0500) Subject: [PATCH] fix race with preempt_enable() X-Git-Tag: v2.6.15-rc7~15^2~4 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=d6f029130fb83b36fb709a187275b0494035d689;p=linux-2.6-omap-h63xx.git [PATCH] fix race with preempt_enable() Currently a simple void foo(void) { preempt_enable(); } produces the following code on ARM: foo: bic r3, sp, #8128 bic r3, r3, #63 ldr r2, [r3, #4] ldr r1, [r3, #0] sub r2, r2, #1 tst r1, #4 str r2, [r3, #4] blne preempt_schedule mov pc, lr The problem is that the TIF_NEED_RESCHED flag is loaded _before_ the preemption count is stored back, hence any interrupt coming within that 3 instruction window causing TIF_NEED_RESCHED to be set won't be seen and scheduling won't happen as it should. Nothing currently prevents gcc from performing that reordering. There is already a barrier() before the decrement of the preemption count, but another one is needed between this and the TIF_NEED_RESCHED flag test for proper code ordering. Signed-off-by: Nicolas Pitre Acked-by: Nick Piggin Signed-off-by: Linus Torvalds --- diff --git a/include/linux/preempt.h b/include/linux/preempt.h index d9a2f5254a5..5769d14d1e6 100644 --- a/include/linux/preempt.h +++ b/include/linux/preempt.h @@ -48,6 +48,7 @@ do { \ #define preempt_enable() \ do { \ preempt_enable_no_resched(); \ + barrier(); \ preempt_check_resched(); \ } while (0)