From: Masayuki Hosokawa <hosokawa@ace-jp.com>
Date: Fri, 21 Mar 2008 04:38:00 +0000 (+0900)
Subject: sh: Hook up remaining IRQ sources for R7780MP FPGA.
X-Git-Tag: v2.6.26-rc1~1135^2~20
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=d391c6217d3214bd8278e1e3517ef57abbc4b317;p=linux-2.6-omap-h63xx.git

sh: Hook up remaining IRQ sources for R7780MP FPGA.

Signed-off-by: Masayuki Hosokawa <hosokawa@ace-jp.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
---

diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
index 1f8f073f27b..68f0ad1b637 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -18,31 +18,44 @@ enum {
 	UNUSED = 0,
 
 	/* board specific interrupt sources */
-	AX88796,          /* Ethernet controller */
-	CF,               /* Compact Flash */
-	PSW,              /* Push Switch */
-	EXT1,             /* EXT1n IRQ */
-	EXT4,             /* EXT4n IRQ */
+	CF,		/* Compact Flash */
+	TP,		/* Touch panel */
+	SCIF1,		/* FPGA SCIF1 */
+	SCIF0,		/* FPGA SCIF0 */
+	SMBUS,		/* SMBUS */
+	RTC,		/* RTC Alarm */
+	AX88796,	/* Ethernet controller */
+	PSW,		/* Push Switch */
+
+	/* external bus connector */
+	EXT1, EXT2, EXT4, EXT5, EXT6,
 };
 
 static struct intc_vect vectors[] __initdata = {
 	INTC_IRQ(CF, IRQ_CF),
-	INTC_IRQ(PSW, IRQ_PSW),
+	INTC_IRQ(TP, IRQ_TP),
+	INTC_IRQ(SCIF1, IRQ_SCIF1),
+	INTC_IRQ(SCIF0, IRQ_SCIF0),
+	INTC_IRQ(SMBUS, IRQ_SMBUS),
+	INTC_IRQ(RTC, IRQ_RTC),
 	INTC_IRQ(AX88796, IRQ_AX88796),
-	INTC_IRQ(EXT1, IRQ_EXT1),
-	INTC_IRQ(EXT4, IRQ_EXT4),
+	INTC_IRQ(PSW, IRQ_PSW),
+
+	INTC_IRQ(EXT1, IRQ_EXT1), INTC_IRQ(EXT2, IRQ_EXT2),
+	INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
+	INTC_IRQ(EXT6, IRQ_EXT6),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
 	{ 0xa4000000, 0, 16, /* IRLMSK */
-	  { 0, 0, 0, 0, CF, 0, 0, 0,
-	    0, 0, 0, EXT4, 0, EXT1, PSW, AX88796 } },
+	  { SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS,
+	    0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } },
 };
 
 static unsigned char irl2irq[HL_NR_IRL] __initdata = {
-	0, IRQ_CF, 0, 0,
-	0, 0, 0, 0,
-	0, IRQ_EXT4, 0, IRQ_EXT1,
+	0, IRQ_CF, IRQ_TP, IRQ_SCIF1,
+	IRQ_SCIF0, IRQ_SMBUS, IRQ_RTC, IRQ_EXT6,
+	IRQ_EXT5, IRQ_EXT4, IRQ_EXT2, IRQ_EXT1,
 	0, IRQ_AX88796, IRQ_PSW,
 };
 
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h
index 1770460a461..a33838f23a6 100644
--- a/include/asm-sh/r7780rp.h
+++ b/include/asm-sh/r7780rp.h
@@ -55,11 +55,11 @@
 #define PA_SCSPTR1      (PA_BCR+0x0524) /* SCIF1 Serial Port control */
 #define PA_SCLSR1       (PA_BCR+0x0528) /* SCIF1 Line Status control */
 #define PA_SCRER1       (PA_BCR+0x052c) /* SCIF1 Serial Error control */
-#define PA_ICCR         (PA_BCR+0x0600) /* Serial control */
-#define PA_SAR          (PA_BCR+0x0602) /* Serial Slave control */
-#define PA_MDR          (PA_BCR+0x0604) /* Serial Mode control */
-#define PA_ADR1         (PA_BCR+0x0606) /* Serial Address1 control */
-#define PA_DAR1         (PA_BCR+0x0646) /* Serial Data1 control */
+#define PA_SMCR         (PA_BCR+0x0600) /* 2-wire Serial control */
+#define PA_SMSMADR      (PA_BCR+0x0602) /* 2-wire Serial Slave control */
+#define PA_SMMR         (PA_BCR+0x0604) /* 2-wire Serial Mode control */
+#define PA_SMSADR1      (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
+#define PA_SMTRDR1      (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
 #define PA_VERREG       (PA_BCR+0x0700) /* FPGA Version Register */
 #define PA_POFF         (PA_BCR+0x0800) /* System Power Off control */
 #define PA_PMR          (PA_BCR+0x0900) /*  */
@@ -107,11 +107,11 @@
 #define PA_SCFCR	(PA_BCR+0x040c)	/* SCIF FIFO control */
 #define PA_SCFDR	(PA_BCR+0x040e)	/* SCIF FIFO data control */
 #define PA_SCLSR	(PA_BCR+0x0412)	/* SCIF Line Status control */
-#define PA_ICCR		(PA_BCR+0x0500)	/* Serial control */
-#define PA_SAR		(PA_BCR+0x0502)	/* Serial Slave control */
-#define PA_MDR		(PA_BCR+0x0504)	/* Serial Mode control */
-#define PA_ADR1		(PA_BCR+0x0506)	/* Serial Address1 control */
-#define PA_DAR1		(PA_BCR+0x0546)	/* Serial Data1 control */
+#define PA_SMCR		(PA_BCR+0x0500)	/* 2-wire Serial control */
+#define PA_SMSMADR	(PA_BCR+0x0502)	/* 2-wire Serial Slave control */
+#define PA_SMMR		(PA_BCR+0x0504)	/* 2-wire Serial Mode control */
+#define PA_SMSADR1	(PA_BCR+0x0506)	/* 2-wire Serial Address1 control */
+#define PA_SMTRDR1	(PA_BCR+0x0546)	/* 2-wire Serial Data1 control */
 #define PA_VERREG	(PA_BCR+0x0600)	/* FPGA Version Register */
 
 #define PA_AX88796L	0xa5800400	/* AX88796L Area */
@@ -190,6 +190,8 @@
 #define IRQ_TP			(HL_FPGA_IRQ_BASE + 12)
 #define IRQ_RTC			(HL_FPGA_IRQ_BASE + 13)
 #define IRQ_TH_ALERT		(HL_FPGA_IRQ_BASE + 14)
+#define IRQ_SCIF0		(HL_FPGA_IRQ_BASE + 15)
+#define IRQ_SCIF1		(HL_FPGA_IRQ_BASE + 16)
 
 unsigned char *highlander_init_irq_r7780mp(void);
 unsigned char *highlander_init_irq_r7780rp(void);