From: Franck Bui-Huu Date: Thu, 18 Oct 2007 07:11:16 +0000 (+0200) Subject: [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align X-Git-Tag: v2.6.25-rc1~1163^2~49 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=cbdbe07f9d60b80c903bddf6533db839789925c7;p=linux-2.6-omap-h63xx.git [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 325bc730ab5..21bcf084882 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -1391,18 +1391,15 @@ static void __init build_r4000_tlb_refill_handler(void) extern void tlb_do_page_fault_0(void); extern void tlb_do_page_fault_1(void); -#define __tlb_handler_align \ - __attribute__((__aligned__(1 << CONFIG_MIPS_L1_CACHE_SHIFT))) - /* * 128 instructions for the fastpath handler is generous and should * never be exceeded. */ #define FASTPATH_SIZE 128 -u32 __tlb_handler_align handle_tlbl[FASTPATH_SIZE]; -u32 __tlb_handler_align handle_tlbs[FASTPATH_SIZE]; -u32 __tlb_handler_align handle_tlbm[FASTPATH_SIZE]; +u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned; +u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned; +u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned; static void __init iPTE_LW(u32 **p, struct label **l, unsigned int pte, unsigned int ptr)