From: Ralf Baechle <ralf@linux-mips.org>
Date: Wed, 5 Apr 2006 08:45:45 +0000 (+0100)
Subject: [MIPS] R2: Instruction hazard barrier.
X-Git-Tag: v2.6.17-rc2~1^2~10
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=bce1a28686ed6527977a198f698278b67c6bf9ec;p=linux-2.6-omap-h63xx.git

[MIPS] R2: Instruction hazard barrier.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 371571f4f28..b1939a486d2 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -119,3 +119,18 @@ syscall_exit_work:
 	li	a1, 1
 	jal	do_syscall_trace
 	b	resume_userspace
+
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
+
+/*
+ * MIPS32R2 Instruction Hazard Barrier - must be called
+ *
+ * For C code use the inline version named instruction_hazard().
+ */
+LEAF(mips_ihb)
+	.set	mips32r2
+	jr.hb	ra
+	nop
+	END(mips_ihb)
+
+#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */