From: Paul Walmsley Date: Wed, 10 Sep 2008 16:47:36 +0000 (-0600) Subject: OMAP2/3 clockdomains: add CM and PRM clkdms X-Git-Tag: v2.6.27-omap1~196 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=a4061e5422dae1433264b40178f73dc6f1d6d748;p=linux-2.6-omap-h63xx.git OMAP2/3 clockdomains: add CM and PRM clkdms Add clockdomains for the CM and PRM. These will ultimately replace the "wkup_clkdm", which appears to not actually exist on the hardware. Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains.h index e17c3693542..ec5a7209099 100644 --- a/arch/arm/mach-omap2/clockdomains.h +++ b/arch/arm/mach-omap2/clockdomains.h @@ -14,6 +14,11 @@ /* * OMAP2/3-common clockdomains + * + * Even though the 2420 has a single PRCM module from the + * interconnect's perspective, internally it does appear to have + * separate PRM and CM clockdomains. The usual test case is + * sys_clkout/sys_clkout2. */ /* This is an implicit clockdomain - it is never defined as such in TRM */ @@ -23,6 +28,18 @@ static struct clockdomain wkup_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), }; +static struct clockdomain prm_clkdm = { + .name = "prm_clkdm", + .pwrdm = { .name = "wkup_pwrdm" }, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), +}; + +static struct clockdomain cm_clkdm = { + .name = "cm_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), +}; + /* * 2420-only clockdomains */ @@ -266,6 +283,8 @@ static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { static struct clockdomain *clockdomains_omap[] = { &wkup_clkdm, + &cm_clkdm, + &prm_clkdm, #ifdef CONFIG_ARCH_OMAP2420 &mpu_2420_clkdm, diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h index 4948cb7af5b..69c9e675d8e 100644 --- a/arch/arm/plat-omap/include/mach/powerdomain.h +++ b/arch/arm/plat-omap/include/mach/powerdomain.h @@ -50,9 +50,9 @@ /* * Maximum number of clockdomains that can be associated with a powerdomain. - * CORE powerdomain is probably the worst case. + * CORE powerdomain on OMAP3 is the worst case */ -#define PWRDM_MAX_CLKDMS 3 +#define PWRDM_MAX_CLKDMS 4 /* XXX A completely arbitrary number. What is reasonable here? */ #define PWRDM_TRANSITION_BAILOUT 100000