From: Linus Torvalds Date: Sun, 11 Sep 2005 16:22:50 +0000 (-0700) Subject: hpt366: write the full 4 bytes of ROM address, not just low 1 byte X-Git-Tag: v2.6.14-rc1~119 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=9ec4ff421f032f24416217f23b0c82dc9a5f38f6;p=linux-2.6-omap-h63xx.git hpt366: write the full 4 bytes of ROM address, not just low 1 byte This is one heck of a confused driver. It uses a byte write to a dword register to enable a ROM resource that it doesn't even seem to be using. "Lost and wandering in the desert of confusion" Signed-off-by: Linus Torvalds --- diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index 7b64db10d1b..127619a109e 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c @@ -1334,9 +1334,13 @@ static int __devinit init_hpt366(struct pci_dev *dev) static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const char *name) { int ret = 0; - /* FIXME: Not portable */ + + /* + * FIXME: Not portable. Also, why do we enable the ROM in the first place? + * We don't seem to be using it. + */ if (dev->resource[PCI_ROM_RESOURCE].start) - pci_write_config_byte(dev, PCI_ROM_ADDRESS, + pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (L1_CACHE_BYTES / 4));