From: Paul Walmsley <paul@pwsan.com>
Date: Thu, 18 Sep 2008 16:30:28 +0000 (-0600)
Subject: OMAP3 clock: omap3_clkoutx2_recalc() should test DPLL IDLEST to determine if DPLL... 
X-Git-Tag: v2.6.27-omap1~172
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=88b5d9b;p=linux-2.6-omap-h63xx.git

OMAP3 clock: omap3_clkoutx2_recalc() should test DPLL IDLEST to determine if DPLL is bypassed

Convert the DPLL bypass test in omap3_clkoutx2_recalc() to test DPLL IDLEST
bits rather than the CM_CLKEN register.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---

diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index c5765bf892e..6963f2e17b1 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -577,11 +577,10 @@ static void omap3_clkoutx2_recalc(struct clk *clk)
 
 	dd = pclk->dpll_data;
 
-	WARN_ON(!dd->control_reg || !dd->enable_mask);
+	WARN_ON(!dd->idlest_reg || !dd->idlest_mask);
 
-	v = __raw_readl(dd->control_reg) & dd->enable_mask;
-	v >>= __ffs(dd->enable_mask);
-	if (v != DPLL_LOCKED)
+	v = __raw_readl(dd->idlest_reg) & dd->idlest_mask;
+	if (!v)
 		clk->rate = clk->parent->rate;
 	else
 		clk->rate = clk->parent->rate * 2;