From: Ralf Baechle Date: Tue, 7 Nov 2006 09:58:30 +0000 (+0000) Subject: [MIPS] Alchemy: Fix bunch of warnings X-Git-Tag: v2.6.21-rc2~42^2~24^2~15 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=786d7cdd06581773ee7913560838d6f4487d2d9f;p=linux-2.6-omap-h63xx.git [MIPS] Alchemy: Fix bunch of warnings CC arch/mips/au1000/common/pci.o arch/mips/au1000/common/pci.c:42: warning: large integer implicitly truncated to unsigned type arch/mips/au1000/common/pci.c:43: warning: large integer implicitly truncated to unsigned type arch/mips/au1000/common/pci.c:49: warning: large integer implicitly truncated to unsigned type arch/mips/au1000/common/pci.c:50: warning: large integer implicitly truncated to unsigned type arch/mips/au1000/common/pci.c: In function ‘au1x_pci_setup’: arch/mips/au1000/common/pci.c:82: warning: ISO C90 forbids mixed declarations and code Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c index 9f8ce08e173..6c25e6c09f7 100644 --- a/arch/mips/au1000/common/pci.c +++ b/arch/mips/au1000/common/pci.c @@ -76,13 +76,17 @@ static int __init au1x_pci_setup(void) } #ifdef CONFIG_DMA_NONCOHERENT - /* - * Set the NC bit in controller for Au1500 pre-AC silicon - */ - u32 prid = read_c0_prid(); - if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { - au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG); - printk("Non-coherent PCI accesses enabled\n"); + { + /* + * Set the NC bit in controller for Au1500 pre-AC silicon + */ + u32 prid = read_c0_prid(); + + if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { + au_writel((1 << 16) | au_readl(Au1500_PCI_CFG), + Au1500_PCI_CFG); + printk("Non-coherent PCI accesses enabled\n"); + } } #endif diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h index 582acd8adb8..43beeaa77b1 100644 --- a/include/asm-mips/mach-au1x00/au1000.h +++ b/include/asm-mips/mach-au1x00/au1000.h @@ -39,6 +39,7 @@ #ifndef _LANGUAGE_ASSEMBLY #include +#include #include /* cpu pipeline flush */ @@ -1664,12 +1665,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; * addresses. For PCI IO, it's simpler because we get to do the ioremap * ourselves and then adjust the device's resources. */ -#define Au1500_EXT_CFG 0x600000000ULL -#define Au1500_EXT_CFG_TYPE1 0x680000000ULL -#define Au1500_PCI_IO_START 0x500000000ULL -#define Au1500_PCI_IO_END 0x5000FFFFFULL -#define Au1500_PCI_MEM_START 0x440000000ULL -#define Au1500_PCI_MEM_END 0x44FFFFFFFULL +#define Au1500_EXT_CFG ((resource_size_t) 0x600000000ULL) +#define Au1500_EXT_CFG_TYPE1 ((resource_size_t) 0x680000000ULL) +#define Au1500_PCI_IO_START ((resource_size_t) 0x500000000ULL) +#define Au1500_PCI_IO_END ((resource_size_t) 0x5000FFFFFULL) +#define Au1500_PCI_MEM_START ((resource_size_t) 0x440000000ULL) +#define Au1500_PCI_MEM_END ((resource_size_t) 0x44FFFFFFFULL) #define PCI_IO_START (Au1500_PCI_IO_START + 0x1000) #define PCI_IO_END (Au1500_PCI_IO_END)