From: Shinya Kuribayashi Date: Thu, 23 Oct 2008 16:31:43 +0000 (+0900) Subject: MIPS: EMMA2RH: Remove emma2rh_sw_irq_base X-Git-Tag: v2.6.28-rc3~95^2~7 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=68ed1ca9120506b2a0f80e4542deea24f89081ab;p=linux-2.6-omap-h63xx.git MIPS: EMMA2RH: Remove emma2rh_sw_irq_base Let's use immediate value, instead. This also saves memory footprint, and probably a little bit faster. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 86b9b6a34f4..c0f9d46c69f 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -53,7 +53,7 @@ * */ -extern void emma2rh_sw_irq_init(u32 base); +extern void emma2rh_sw_irq_init(void); extern void emma2rh_gpio_irq_init(u32 base); extern void emma2rh_irq_init(void); extern void emma2rh_irq_dispatch(void); @@ -103,7 +103,7 @@ void __init arch_init_irq(void) /* init all controllers */ emma2rh_irq_init(); - emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE); + emma2rh_sw_irq_init(); emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); mips_cpu_irq_init(); diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c index bbe0d711f00..18834216d6f 100644 --- a/arch/mips/emma/markeins/irq_markeins.c +++ b/arch/mips/emma/markeins/irq_markeins.c @@ -30,7 +30,6 @@ #include #include -static int emma2rh_sw_irq_base = -1; static int emma2rh_gpio_irq_base = -1; void ll_emma2rh_sw_irq_enable(int reg); @@ -40,12 +39,12 @@ void ll_emma2rh_gpio_irq_disable(int reg); static void emma2rh_sw_irq_enable(unsigned int irq) { - ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base); + ll_emma2rh_sw_irq_enable(irq - EMMA2RH_SW_IRQ_BASE); } static void emma2rh_sw_irq_disable(unsigned int irq) { - ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base); + ll_emma2rh_sw_irq_disable(irq - EMMA2RH_SW_IRQ_BASE); } struct irq_chip emma2rh_sw_irq_controller = { @@ -56,15 +55,14 @@ struct irq_chip emma2rh_sw_irq_controller = { .unmask = emma2rh_sw_irq_enable, }; -void emma2rh_sw_irq_init(u32 irq_base) +void emma2rh_sw_irq_init(void) { u32 i; - for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++) - set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller, + for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++) + set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i, + &emma2rh_sw_irq_controller, handle_level_irq); - - emma2rh_sw_irq_base = irq_base; } void ll_emma2rh_sw_irq_enable(int irq)