From: Paul Walmsley <paul@pwsan.com>
Date: Mon, 27 Aug 2007 08:39:08 +0000 (-0600)
Subject: omap2 clock: stop using clk->src_offset in omap2_clk_set_rate()
X-Git-Tag: v2.6.23-omap1~115
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=612fe81a9e16836135d8108ba1a2b58ba7eff2fd;p=linux-2.6-omap-h63xx.git

omap2 clock: stop using clk->src_offset in omap2_clk_set_rate()

Stop using clk->rate_offset in omap2_clk_set_rate(); use what we get
from the clksel code instead.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 7bfa3cdca0d..3842f6dcc03 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -781,17 +781,14 @@ static u32 omap2_clksel_get_divisor(struct clk *clk)
 static int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
 {
 	int ret = -EINVAL;
-	u32 div_off, field_mask, field_val, reg_val, validrate;
-	u32 new_div = 0;
+	u32 field_mask, field_val, reg_val, new_div = 0;
+	unsigned long validrate;
 	void __iomem *div_addr;
 
 	if (!(clk->flags & CONFIG_PARTICIPANT) && (clk->flags & RATE_CKCTL)) {
 		if (clk == &dpll_ck)
 			return omap2_reprogram_dpll(clk, rate);
 
-		/* Isolate control register */
-		div_off = clk->rate_offset;
-
 		validrate = omap2_clksel_round_rate(clk, rate, &new_div);
 		if (validrate != rate)
 			return ret;
@@ -806,7 +803,7 @@ static int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
 
 		reg_val = cm_read_reg(div_addr);
 		reg_val &= ~field_mask;
-		reg_val |= (field_val << div_off);
+		reg_val |= (field_val << mask_to_shift(field_mask));
 		cm_write_reg(reg_val, div_addr);
 		wmb();
 		clk->rate = clk->parent->rate / new_div;