From: Eric W. Biederman <ebiederm@xmission.com>
Date: Mon, 5 Mar 2007 08:30:11 +0000 (-0800)
Subject: [PATCH] msi: support masking msi irqs without a mask bit
X-Git-Tag: v2.6.21-rc3~93
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=58e0543e8f355b32f0778a18858b255adb7402ae;p=linux-2.6-omap-h63xx.git

[PATCH] msi: support masking msi irqs without a mask bit

For devices that do not support msi-x we only support 1 interrupt.  Therefore
we can disable that one interrupt by disabling the msi capability itself.  If
we leave the intx interrupts disabled while we have the msi capability
disabled no interrupts should be delivered from that device.

Devices with just the minimal msi support (and thus hitting this code path)
include things like the intel e1000 nic, so it looks like is going to be a
fairly common case and thus important to get right.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Michael Ellerman <michael@ellerman.id.au>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
---

diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index c43e7d22e18..01869b1782e 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -85,6 +85,8 @@ static void msi_set_mask_bit(unsigned int irq, int flag)
 			mask_bits &= ~(1);
 			mask_bits |= flag;
 			pci_write_config_dword(entry->dev, pos, mask_bits);
+		} else {
+			msi_set_enable(entry->dev, !flag);
 		}
 		break;
 	case PCI_CAP_ID_MSIX: