From: Wang Zhenyu <zhenyu.z.wang@intel.com>
Date: Tue, 10 Apr 2007 01:42:48 +0000 (+0800)
Subject: [AGPGART] intel_agp: fix G965 GTT size detect
X-Git-Tag: v2.6.21-rc7~27^2
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=52ea0718ea506df0915eacedb439e65c5f214e0e;p=linux-2.6-omap-h63xx.git

[AGPGART] intel_agp: fix G965 GTT size detect

On G965, I810_PGETBL_CTL is a mmio offset, but we wrongly take it
as pci config space offset in detecting GTT size. This one line patch
fixs this.

Signed-off-by: Wang Zhenyu <zhenyu.z.wang@intel.com>
Signed-off-by: Dave Jones <davej@redhat.com>
---

diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index a9fdbf9126c..55392a45a14 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -431,9 +431,8 @@ static void intel_i830_init_gtt_entries(void)
 
 	if (IS_I965) {
 		u32 pgetbl_ctl;
+		pgetbl_ctl = readl(intel_i830_private.registers+I810_PGETBL_CTL);
 
-		pci_read_config_dword(agp_bridge->dev, I810_PGETBL_CTL,
-				      &pgetbl_ctl);
 		/* The 965 has a field telling us the size of the GTT,
 		 * which may be larger than what is necessary to map the
 		 * aperture.