From: Ingo Molnar Date: Sat, 28 Mar 2009 21:27:45 +0000 (+0100) Subject: Merge branch 'linus' into x86/core X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=3fab191002b184e4390aa07c7149c6cc7b638ec7;p=linux-2.6-omap-h63xx.git Merge branch 'linus' into x86/core --- 3fab191002b184e4390aa07c7149c6cc7b638ec7 diff --cc arch/x86/kernel/cpu/intel.c index b09d4eb52bb,1a89a2b68d1..7437fa133c0 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@@ -54,14 -54,12 +55,17 @@@ static void __cpuinit early_init_intel( c->x86_cache_alignment = 128; #endif + /* CPUID workaround for 0F33/0F34 CPU */ + if (c->x86 == 0xF && c->x86_model == 0x3 + && (c->x86_mask == 0x3 || c->x86_mask == 0x4)) + c->x86_phys_bits = 36; + /* * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate - * with P/T states and does not stop in deep C-states + * with P/T states and does not stop in deep C-states. + * + * It is also reliable across cores and sockets. (but not across + * cabinets - we turn it off in that case explicitly.) */ if (c->x86_power & (1 << 8)) { set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);