From: Arnd Bergmann <arnd@arndb.de>
Date: Fri, 9 Dec 2005 18:04:18 +0000 (+0100)
Subject: [PATCH] spufs: clear dsisr on CLASS1[Mf] exception
X-Git-Tag: v2.6.16-rc1~666^2~59
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=38307341af3a0be8ec5319756361b51ac29dffc7;p=linux-2.6-omap-h63xx.git

[PATCH] spufs: clear dsisr on CLASS1[Mf] exception

Because of always clearing DSISR at spu class 1 interrupt handler,
kernel may lose Class1[Mf] interrupt.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Geoff Levand <geoff.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
---

diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index f9da79eb3db..3a5302151e0 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -240,7 +240,8 @@ spu_irq_class_1(int irq, void *data, struct pt_regs *regs)
 	stat  = in_be64(&spu->priv1->int_stat_class1_RW) & mask;
 	dar   = in_be64(&spu->priv1->mfc_dar_RW);
 	dsisr = in_be64(&spu->priv1->mfc_dsisr_RW);
-	out_be64(&spu->priv1->mfc_dsisr_RW, 0UL);
+	if (stat & 2) /* mapping fault */
+		out_be64(&spu->priv1->mfc_dsisr_RW, 0UL);
 	out_be64(&spu->priv1->int_stat_class1_RW, stat);
 	spin_unlock(&spu->register_lock);