From: Paul Walmsley <paul@pwsan.com>
Date: Mon, 3 Dec 2007 23:24:29 +0000 (-0700)
Subject: 24xx clock: Fix 54MHz APLL readiness test
X-Git-Tag: v2.6.24-omap1~124
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=37d254b18fa6e3f2c146770297ddd7343e352421;p=linux-2.6-omap-h63xx.git

24xx clock: Fix 54MHz APLL readiness test

omap2_clk_fixed_enable() was checking the wrong bit to determine if
the 54MHz APLL was ready, causing a "Clock apll54_ck didn't enable in
100000 tries" warning message on 2430SDP:

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---

diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 975d35e38af..1053fc9d44d 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -115,7 +115,7 @@ static int omap2_clk_fixed_enable(struct clk *clk)
 	if (clk == &apll96_ck)
 		cval = OMAP24XX_ST_96M_APLL;
 	else if (clk == &apll54_ck)
-		cval = OMAP24XX_ST_54M_CLK;
+		cval = OMAP24XX_ST_54M_APLL;
 
 	omap2_wait_clock_ready(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval,
 			    clk->name);