From: Rajendra Nayak Date: Wed, 6 Aug 2008 13:14:32 +0000 (+0530) Subject: sdrc register defs X-Git-Tag: v2.6.27-omap1~296 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=3568f5b42fa2349dc50a99b0dba952cf9e71d1bd;p=linux-2.6-omap-h63xx.git sdrc register defs This patch adds some missing sdrc register definitions Signed-off-by: Rajendra Nayak Signed-off-by: Tony Lindgren --- diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 5185a31122d..2c714613634 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S @@ -165,9 +165,9 @@ omap3_cm_iclken1_core: omap3_sdrc_rfr_ctrl: .word OMAP34XX_SDRC_REGADDR(SDRC_RFR_CTRL_0) omap3_sdrc_actim_ctrla: - .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A) + .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A_0) omap3_sdrc_actim_ctrlb: - .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B) + .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B_0) omap3_sdrc_dlla_status: .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) omap3_sdrc_dlla_ctrl: diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index 9cb1e2359e4..b7db862806a 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h @@ -21,15 +21,24 @@ /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ #define SDRC_SYSCONFIG 0x010 +#define SDRC_CS_CFG 0x040 +#define SDRC_SHARING 0x044 +#define SDRC_ERR_TYPE 0x04C #define SDRC_DLLA_CTRL 0x060 #define SDRC_DLLA_STATUS 0x064 #define SDRC_DLLB_CTRL 0x068 #define SDRC_DLLB_STATUS 0x06C #define SDRC_POWER 0x070 +#define SDRC_MCFG_0 0x080 #define SDRC_MR_0 0x084 -#define SDRC_ACTIM_CTRL_A 0x09c -#define SDRC_ACTIM_CTRL_B 0x0a0 +#define SDRC_ACTIM_CTRL_A_0 0x09c +#define SDRC_ACTIM_CTRL_B_0 0x0a0 #define SDRC_RFR_CTRL_0 0x0a4 +#define SDRC_MCFG_1 0x0B0 +#define SDRC_MR_1 0x0B4 +#define SDRC_ACTIM_CTRL_A_1 0x0C4 +#define SDRC_ACTIM_CTRL_B_1 0x0C8 +#define SDRC_RFR_CTRL_1 0x0D4 /* * These values represent the number of memory clock cycles between