From: Jesse Brandeburg Date: Wed, 1 Nov 2006 16:47:42 +0000 (-0800) Subject: e1000: add mmiowb() for IA64 to sync tail writes X-Git-Tag: v2.6.20-rc2~6^2~13^2~468^2~85 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=2ce9047f5d8464039da8ff986e71be5546e229c0;p=linux-2.6-omap-h63xx.git e1000: add mmiowb() for IA64 to sync tail writes IA64 SMP systems were seeing TX issues with multiple cpu's attempting to write tail registers unordered. This mmiowb() fixes the issue. Signed-off-by: Auke Kok Signed-off-by: Jesse Brandeburg --- diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index 93b97c6b8a6..681b738c6da 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c @@ -2867,6 +2867,9 @@ e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, tx_ring->next_to_use = i; writel(i, adapter->hw.hw_addr + tx_ring->tdt); + /* we need this if more than one processor can write to our tail + * at a time, it syncronizes IO on IA64/Altix systems */ + mmiowb(); } /**