From: Ben Dooks Date: Wed, 3 Aug 2005 18:49:16 +0000 (+0100) Subject: [PATCH] ARM: 2832/1: BAST - limit clock-rate for IIC bus X-Git-Tag: v2.6.13-rc6~74^2~6 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=1fcf844861eb08ee05e05dba13b5436f2f2e29ed;p=linux-2.6-omap-h63xx.git [PATCH] ARM: 2832/1: BAST - limit clock-rate for IIC bus Patch from Ben Dooks The default clock rate does not specify a maximum, so the default of 400KHz is used. This rate is too fast for the PMU on the EB2410ITX, so we now specify platform data with a rate of around 100KHz. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 1e7f343822d..e9182242da9 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -30,6 +30,7 @@ * 28-Jun-2005 BJD Moved pm functionality out to common code * 17-Jul-2005 BJD Changed to platform device for SuperIO 16550s * 25-Jul-2005 BJD Removed ASIX static mappings + * 27-Jul-2005 BJD Ensure maximum frequency of i2c bus */ #include @@ -60,6 +61,7 @@ #include #include #include +#include #include #include @@ -304,7 +306,7 @@ static void bast_nand_select(struct s3c2410_nand_set *set, int slot) } static struct s3c2410_platform_nand bast_nand_info = { - .tacls = 80, + .tacls = 40, .twrph0 = 80, .twrph1 = 80, .nr_sets = ARRAY_SIZE(bast_nand_sets), @@ -385,6 +387,17 @@ static struct platform_device bast_sio = { }, }; +/* we have devices on the bus which cannot work much over the + * standard 100KHz i2c bus frequency +*/ + +static struct s3c2410_platform_i2c bast_i2c_info = { + .flags = 0, + .slave_addr = 0x10, + .bus_freq = 100*1000, + .max_freq = 130*1000, +}; + /* Standard BAST devices */ static struct platform_device *bast_devices[] __initdata = { @@ -431,6 +444,7 @@ void __init bast_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1; s3c_device_nand.dev.platform_data = &bast_nand_info; + s3c_device_i2c.dev.platform_data = &bast_i2c_info; s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); s3c24xx_init_clocks(0);