From: Eric Dumazet Date: Tue, 6 Sep 2005 22:16:17 +0000 (-0700) Subject: [PATCH] x86_64: prefetchw() can fall back to prefetch() if !3DNOW X-Git-Tag: v2.6.14-rc1~742 X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=19aaabb5841439988fc357f90d5c59d28fa84658;p=linux-2.6-omap-h63xx.git [PATCH] x86_64: prefetchw() can fall back to prefetch() if !3DNOW This is a multi-part message in MIME format. If the cpu lacks 3DNOW feature, we can use a normal prefetcht0 instruction instead of NOP5. "prefetchw (%rxx)" and "prefetcht0 (%rxx)" have the same length, ranging from 3 to 5 bytes depending on the register. So this patch even helps AMD64, shortening the length of the code. Signed-off-by: Eric Dumazet Acked-by: Andi Kleen Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h index 194160f6a43..a8321999448 100644 --- a/include/asm-x86_64/processor.h +++ b/include/asm-x86_64/processor.h @@ -398,7 +398,7 @@ static inline void prefetch(void *x) #define ARCH_HAS_PREFETCHW 1 static inline void prefetchw(void *x) { - alternative_input(ASM_NOP5, + alternative_input("prefetcht0 (%1)", "prefetchw (%1)", X86_FEATURE_3DNOW, "r" (x));