From: Tony Lindgren <tony@atomide.com>
Date: Tue, 1 Apr 2008 13:58:02 +0000 (+0300)
Subject: I2C: Fix twl4030 clock init
X-Git-Tag: v2.6.25-omap1~80
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=0d81cf7e804c529c58d3054c1b9bdb7b3f1dec5d;p=linux-2.6-omap-h63xx.git

I2C: Fix twl4030 clock init

Without this patch twl4030 clock can get programmed to incorrect rate
which can eventually hang twl4030 reads. Also minor formatting fixes.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---

diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
index c979241f377..cb457b3ddf7 100644
--- a/drivers/i2c/chips/twl4030-core.c
+++ b/drivers/i2c/chips/twl4030-core.c
@@ -672,11 +672,20 @@ static int power_companion_init(void)
 	u32 rate, ctrl = HFCLK_FREQ_26_MHZ;
 	int e = 0;
 
-	osc = clk_get(NULL,"osc_ck");
+	if (cpu_is_omap2430())
+		osc = clk_get(NULL, "osc_ck");
+	else
+		osc = clk_get(NULL, "osc_sys_ck");
+	if (IS_ERR(osc)) {
+		printk(KERN_ERR "Skipping twl3040 internal clock init and "
+				"using bootloader value (unknown osc rate)\n");
+		return 0;
+	}
+
 	rate = clk_get_rate(osc);
 	clk_put(osc);
 
-	switch(rate) {
+	switch (rate) {
 		case 19200000 : ctrl = HFCLK_FREQ_19p2_MHZ; break;
 		case 26000000 : ctrl = HFCLK_FREQ_26_MHZ; break;
 		case 38400000 : ctrl = HFCLK_FREQ_38p4_MHZ; break;
@@ -684,7 +693,7 @@ static int power_companion_init(void)
 
 	ctrl |= HIGH_PERF_SQ;
 	e |= unprotect_pm_master();
-			/* effect->MADC+USB ck en */
+	/* effect->MADC+USB ck en */
 	e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
 	e |= protect_pm_master();