From: Tony Lindgren <tony@atomide.com>
Date: Mon, 20 Feb 2006 23:51:49 +0000 (-0800)
Subject: ARM: OMAP: Set serial 8250 ECB for TX fifo
X-Git-Tag: v2.6.16-omap1~56^2
X-Git-Url: http://pilppa.com/gitweb/?a=commitdiff_plain;h=07ac0630c2f63cf321b0afc4888a285bc2844117;p=linux-2.6-omap-h63xx.git

ARM: OMAP: Set serial 8250 ECB for TX fifo

Code to fix serial TX fifo by Richard Woodruff.

The extended capabilities bit is needed to write fcr, or else some
settings don't get set.  That is what the OMAP-UART data sheet says.
The write water mark bits 4:5 are not accessible unless ECB is set.

The data sheet says it is TI16C750 compatible but it seems to share more
with what the code calls a TI16C752.  The 750 has a DLAB to set 64bit
fifo and I don't believe that is the case for ours.

A minor note is we are still only using 32 bytes of the 64 byte TX fifo
for transmits in the current code.  I'm not sure if there is an
application that this matters to.

Note that the current code id's OMAP serial ports as a 16654 which isn't
quite correct.

Also note that to use the actual TX watermark interrupt set at 32bytes
required too ugly of a hack to use (not use OMAP_SCR=0).
---

diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index c79c8d17825..494e8b89715 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -1891,6 +1891,19 @@ serial8250_set_termios(struct uart_port *port, struct termios *termios,
 			/* emulated UARTs (Lucent Venus 167x) need two steps */
 			serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 		}
+
+		/* Note that we need to set ECB to access write water mark
+		 * bits. First allow FCR tx fifo write, then set fcr with
+		 * possible TX fifo settings. */
+		if (uart_config[up->port.type].flags & UART_CAP_EFR) {
+			serial_outp(up, UART_LCR, 0xbf);	/* Access EFR */
+			serial_outp(up, UART_EFR, UART_EFR_ECB);
+			serial_outp(up, UART_LCR, 0x0);		/* Access FCR */
+			serial_outp(up, UART_FCR, fcr);
+			serial_outp(up, UART_LCR, 0xbf);	/* Access EFR */
+			serial_outp(up, UART_EFR, 0);
+			serial_outp(up, UART_LCR, cval);	/* Access FCR */
+        } else
 		serial_outp(up, UART_FCR, fcr);		/* set fcr */
 	}
 	serial8250_set_mctrl(&up->port, up->port.mctrl);