drm/radeon: don't actually enable the IRQ regs until irq is enabled

vblank can try and enable the IRQ registers before we've set the interrupt
handler up.

Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 7a183789be978d97d3e317b141c5119ff2dfe9c6..3bbb871b25d5102a2b6d832702cc55bc338a70ea 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -299,7 +299,6 @@ typedef struct drm_radeon_private {
        atomic_t swi_emitted;
        int vblank_crtc;
        uint32_t irq_enable_reg;
-       int irq_enabled;
        uint32_t r500_disp_irq_reg;
 
        struct radeon_surface surfaces[RADEON_MAX_SURFACES];

diff --git a/drivers/gpu/drm/radeon/radeon_irq.c b/drivers/gpu/drm/radeon/radeon_irq.c
index 97c0599fdb1e2c49898c14c0ba097101978f8dc2..99be11418ac2dcecf8b3718ca5e8ba82478dc0b1 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_irq.c
+++ b/drivers/gpu/drm/radeon/radeon_irq.c
@@ -44,7 +44,8 @@ void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state)
        else
                dev_priv->irq_enable_reg &= ~mask;
 
-       RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
+       if (!dev->irq_enabled)
+               RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
 }
 
 static void r500_vbl_irq_set_state(struct drm_device *dev, u32 mask, int state)
@@ -56,7 +57,8 @@ static void r500_vbl_irq_set_state(struct drm_device *dev, u32 mask, int state)
        else
                dev_priv->r500_disp_irq_reg &= ~mask;
 
-       RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
+       if (!dev->irq_enabled)
+               RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
 }
 
 int radeon_enable_vblank(struct drm_device *dev, int crtc)
@@ -355,8 +357,6 @@ void radeon_driver_irq_uninstall(struct drm_device * dev)
        if (!dev_priv)
                return;
 
-       dev_priv->irq_enabled = 0;
-
        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
                RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
        /* Disable *all* interrupts */