]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
b44: Unconditionally enable interrupt routing on reset
authorMichael Buesch <mb@bu3sch.de>
Fri, 27 Feb 2009 06:33:00 +0000 (22:33 -0800)
committerDavid S. Miller <davem@davemloft.net>
Fri, 27 Feb 2009 06:33:00 +0000 (22:33 -0800)
Unconditionally setup the IRQ routing on chip reset.
It's safe to call ssb_pcicore_dev_irqvecs_enable() unconditionally, because
it has internal checks for redundant calls.

This fixes problems where hardware will not come up properly
due to quirks in the enable-bit hardware.

Reported-by: Pantelis Koukousoulas <pktoss@gmail.com>
Signed-off-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/b44.c

index c38512ebcea65fd0408ae0821d3be177b2854e26..6b8c39f2cf101e6ee083e8602bac5a5f8e2a5df8 100644 (file)
@@ -1264,8 +1264,14 @@ static void b44_clear_stats(struct b44 *bp)
 static void b44_chip_reset(struct b44 *bp, int reset_kind)
 {
        struct ssb_device *sdev = bp->sdev;
+       bool was_enabled;
 
-       if (ssb_device_is_enabled(bp->sdev)) {
+       was_enabled = ssb_device_is_enabled(bp->sdev);
+
+       ssb_device_enable(bp->sdev, 0);
+       ssb_pcicore_dev_irqvecs_enable(&sdev->bus->pcicore, sdev);
+
+       if (was_enabled) {
                bw32(bp, B44_RCV_LAZY, 0);
                bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE);
                b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 200, 1);
@@ -1277,10 +1283,8 @@ static void b44_chip_reset(struct b44 *bp, int reset_kind)
                }
                bw32(bp, B44_DMARX_CTRL, 0);
                bp->rx_prod = bp->rx_cons = 0;
-       } else
-               ssb_pcicore_dev_irqvecs_enable(&sdev->bus->pcicore, sdev);
+       }
 
-       ssb_device_enable(bp->sdev, 0);
        b44_clear_stats(bp);
 
        /*