edac: i5100 fix missing bits

The error mask we use to trigger ECC notifications is missing many bits of
interest.  We add these bits here so that all possible ECC errors can be
reported.

Signed-off-by: Arthur Jones <ajones@riverbed.com>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c
index 43430bf70181e59c623d78bf5acfe431f12acc00..a8767a6c1481db3dca8cd17dc16dcccb929fcb99 100644 (file)
--- a/drivers/edac/i5100_edac.c
+++ b/drivers/edac/i5100_edac.c
@@ -52,12 +52,24 @@
 #define                I5100_FERR_NF_MEM_M16ERR_MASK   (1 << 16)
 #define                I5100_FERR_NF_MEM_M15ERR_MASK   (1 << 15)
 #define                I5100_FERR_NF_MEM_M14ERR_MASK   (1 << 14)
-#define                I5100_FERR_NF_MEM_
-#define                I5100_FERR_NF_MEM_
+#define                I5100_FERR_NF_MEM_M12ERR_MASK   (1 << 12)
+#define                I5100_FERR_NF_MEM_M11ERR_MASK   (1 << 11)
+#define                I5100_FERR_NF_MEM_M10ERR_MASK   (1 << 10)
+#define                I5100_FERR_NF_MEM_M6ERR_MASK    (1 << 6)
+#define                I5100_FERR_NF_MEM_M5ERR_MASK    (1 << 5)
+#define                I5100_FERR_NF_MEM_M4ERR_MASK    (1 << 4)
+#define                I5100_FERR_NF_MEM_M1ERR_MASK    1
 #define                I5100_FERR_NF_MEM_ANY_MASK      \
                        (I5100_FERR_NF_MEM_M16ERR_MASK | \
                        I5100_FERR_NF_MEM_M15ERR_MASK | \
-                       I5100_FERR_NF_MEM_M14ERR_MASK)
+                       I5100_FERR_NF_MEM_M14ERR_MASK | \
+                       I5100_FERR_NF_MEM_M12ERR_MASK | \
+                       I5100_FERR_NF_MEM_M11ERR_MASK | \
+                       I5100_FERR_NF_MEM_M10ERR_MASK | \
+                       I5100_FERR_NF_MEM_M6ERR_MASK | \
+                       I5100_FERR_NF_MEM_M5ERR_MASK | \
+                       I5100_FERR_NF_MEM_M4ERR_MASK | \
+                       I5100_FERR_NF_MEM_M1ERR_MASK)
 #define                I5100_FERR_NF_MEM_ANY(a)  ((a) & I5100_FERR_NF_MEM_ANY_MASK)
 #define        I5100_NERR_NF_MEM       0xa4    /* MC Next Non-Fatal Errors */
 #define                I5100_NERR_NF_MEM_ANY(a)  I5100_FERR_NF_MEM_ANY(a)