Preliminary high speed electrical test support for the host side.
musb_g_giveback(&pThis->aLocalEnd[0].ep_in, req, 0);
}
-
-/* for high speed test mode; see USB 2.0 spec 7.1.20 */
-static const u8 musb_test_packet[53] = {
- /* implicit SYNC then DATA0 to start */
-
- /* JKJKJKJK x9 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /* JJKKJJKK x8 */
- 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
- /* JJJJKKKK x8 */
- 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
- /* JJJJJJJKKKKKKK x8 */
- 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- /* JJJJJJJK x8 */
- 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
- /* JKKKKKKK x10, JK */
- 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e
-
- /* implicit CRC16 then EOP to end */
-};
-
/*
* Handle all control requests with no DATA stage, including standard
* requests such as:
else if (pThis->bTestMode) {
DBG(1, "entering TESTMODE\n");
- if (MGC_M_TEST_PACKET == pThis->bTestModeValue) {
- musb_write_fifo(&pThis->aLocalEnd[0],
- sizeof(musb_test_packet),
- musb_test_packet);
- }
-
- musb_writew(regs, MGC_O_HDRC_CSR0, MGC_M_CSR0_TXPKTRDY);
+ if (MGC_M_TEST_PACKET == pThis->bTestModeValue)
+ musb_load_testpacket(pThis);
musb_writeb(pBase, MGC_O_HDRC_TESTMODE,
pThis->bTestModeValue);
extern void musb_read_fifo(struct musb_hw_ep *ep,
u16 wCount, u8 * pDest);
+extern void musb_load_testpacket(struct musb *);
+
extern irqreturn_t musb_interrupt(struct musb *);
extern void musb_platform_enable(struct musb *musb);
#endif /* normal PIO */
+
+/*-------------------------------------------------------------------------*/
+
+/* for high speed test mode; see USB 2.0 spec 7.1.20 */
+static const u8 musb_test_packet[53] = {
+ /* implicit SYNC then DATA0 to start */
+
+ /* JKJKJKJK x9 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* JJKKJJKK x8 */
+ 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+ /* JJJJKKKK x8 */
+ 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
+ /* JJJJJJJKKKKKKK x8 */
+ 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ /* JJJJJJJK x8 */
+ 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
+ /* JKKKKKKK x10, JK */
+ 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e
+
+ /* implicit CRC16 then EOP to end */
+};
+
+void musb_load_testpacket(struct musb *musb)
+{
+ MGC_SelectEnd(musb->pRegs, 0);
+ musb_write_fifo(musb->control_ep,
+ sizeof(musb_test_packet), musb_test_packet);
+ musb_writew(musb->pRegs, MGC_O_HDRC_CSR0, MGC_M_CSR0_TXPKTRDY);
+}
+
/*-------------------------------------------------------------------------*/
/*
musb->port1_status);
break;
case SetPortFeature:
- if (wIndex != 1)
+ if ((wIndex & 0xff) != 1)
goto error;
switch (wValue) {
musb_port_suspend(musb, TRUE);
break;
case USB_PORT_FEAT_TEST:
+ wIndex >>= 8;
+ switch (wIndex) {
+ case 1:
+ pr_debug("TEST_J\n");
+ temp = MGC_M_TEST_J;
+ break;
+ case 2:
+ pr_debug("TEST_K\n");
+ temp = MGC_M_TEST_K;
+ break;
+ case 3:
+ pr_debug("TEST_SE0_NAK\n");
+ temp = MGC_M_TEST_SE0_NAK;
+ break;
+ case 4:
+ pr_debug("TEST_PACKET\n");
+ temp = MGC_M_TEST_PACKET;
+ musb_load_testpacket(musb);
+ break;
+ case 5:
+ pr_debug("TEST_FORCE_ENABLE\n");
+ temp = MGC_M_TEST_FORCE_HOST
+ | MGC_M_TEST_FORCE_HS;
+
+ /* FIXME and enable a session too */
+ break;
+ default:
+ goto error;
+ }
+ musb_writeb(musb->pRegs, MGC_O_HDRC_TESTMODE, temp);
+ musb->port1_status |= USB_PORT_STAT_TEST;
break;
default:
goto error;