In general, drivers should now use ioremap.
Signed-off-by: Tony Lindgren <tony@atomide.com>
static int clkout2_mux_disabled = 0;
static u32 saved_mux[2];
-#define MUX_EAC_IOP2V(x) (__force void __iomem *)io_p2v(x)
-
static void n800_enable_eac_mux(void)
{
if (!eac_mux_disabled)
return;
- __raw_writel(saved_mux[1], MUX_EAC_IOP2V(0x48000124));
+ __raw_writel(saved_mux[1], OMAP2_IO_ADDRESS(0x48000124));
eac_mux_disabled = 0;
}
WARN_ON(eac_mux_disabled);
return;
}
- saved_mux[1] = __raw_readl(MUX_EAC_IOP2V(0x48000124));
- __raw_writel(0x1f1f1f1f, MUX_EAC_IOP2V(0x48000124));
+ saved_mux[1] = __raw_readl(OMAP2_IO_ADDRESS(0x48000124));
+ __raw_writel(0x1f1f1f1f, OMAP2_IO_ADDRESS(0x48000124));
eac_mux_disabled = 1;
}
{
if (!clkout2_mux_disabled)
return;
- __raw_writel(saved_mux[0], MUX_EAC_IOP2V(0x480000e8));
+ __raw_writel(saved_mux[0], OMAP2_IO_ADDRESS(0x480000e8));
clkout2_mux_disabled = 0;
}
WARN_ON(clkout2_mux_disabled);
return;
}
- saved_mux[0] = __raw_readl(MUX_EAC_IOP2V(0x480000e8));
+ saved_mux[0] = __raw_readl(OMAP2_IO_ADDRESS(0x480000e8));
l = saved_mux[0] & ~0xff;
l |= 0x1f;
- __raw_writel(l, MUX_EAC_IOP2V(0x480000e8));
+ __raw_writel(l, OMAP2_IO_ADDRESS(0x480000e8));
clkout2_mux_disabled = 1;
}
#endif
/* arch/arm/plat-omap/sti/sti.c */
-extern unsigned long sti_base, sti_channel_base;
+extern void __iomem *sti_base, *sti_channel_base;
int sti_request_irq(unsigned int irq, void *handler, unsigned long arg);
void sti_free_irq(unsigned int irq);
case 1:
irq = INT_UART1;
info->uart_ck = clk_get(NULL, "uart1_ck");
- info->uart_base = io_p2v((unsigned long)OMAP_UART1_BASE);
+ /* FIXME: Use platform_get_resource for the port */
+ info->uart_base = ioremap(OMAP_UART1_BASE, 0x16);
+ if (!info->uart_base)
+ goto cleanup;
break;
case 2:
irq = INT_UART2;
info->uart_ck = clk_get(NULL, "uart2_ck");
- info->uart_base = io_p2v((unsigned long)OMAP_UART2_BASE);
+ /* FIXME: Use platform_get_resource for the port */
+ info->uart_base = ioremap(OMAP_UART2_BASE, 0x16);
+ if (!info->uart_base)
+ goto cleanup;
break;
case 3:
irq = INT_UART3;
info->uart_ck = clk_get(NULL, "uart3_ck");
- info->uart_base = io_p2v((unsigned long)OMAP_UART3_BASE);
+ /* FIXME: Use platform_get_resource for the port */
+ info->uart_base = ioremap(OMAP_UART3_BASE, 0x16);
+ if (!info->uart_base)
+ goto cleanup;
break;
default:
printk(KERN_ERR "No uart defined\n");
info->uart_iclk = clk_get(NULL, "uart1_ick");
info->uart_fclk = clk_get(NULL, "uart1_fck");
}
- info->uart_base = (void *)io_p2v(OMAP_UART1_BASE);
+ /* FIXME: Use platform_get_resource for the port */
+ info->uart_base = ioremap(OMAP_UART1_BASE, 0x16);
+ if (!info->uart_base)
+ goto cleanup;
break;
case 2:
if (cpu_is_omap16xx()) {
info->uart_iclk = clk_get(NULL, "uart2_ick");
info->uart_fclk = clk_get(NULL, "uart2_fck");
}
- info->uart_base = (void *)io_p2v(OMAP_UART2_BASE);
+ /* FIXME: Use platform_get_resource for the port */
+ info->uart_base = ioremap(OMAP_UART2_BASE, 0x16);
+ if (!info->uart_base)
+ goto cleanup;
break;
case 3:
if (cpu_is_omap16xx()) {
info->uart_iclk = clk_get(NULL, "uart3_ick");
info->uart_fclk = clk_get(NULL, "uart3_fck");
}
- info->uart_base = (void *)io_p2v(OMAP_UART3_BASE);
+ /* FIXME: Use platform_get_resource for the port */
+ info->uart_base = ioremap(OMAP_UART3_BASE, 0x16);
+ if (!info->uart_base)
+ goto cleanup;
break;
default:
dev_err(info->dev, "No uart defined\n");
u32 base;
#ifdef CONFIG_ARCH_OMAP1
- base = (u32) io_p2v(OMAP_MPUIO_BASE);
+ base = OMAP1_IO_ADDRESS(OMAP_MPUIO_BASE);
#else
base = 0;
#endif
return NULL;
}
} else
- cam_iobase = io_p2v(CAMERA_BASE);
+ cam_iobase = OMAP1_IO_ADDRESS(CAMERA_BASE);
/* Set the base address of the camera registers */
hardware_data.camera_regs = (camera_regs_t *) cam_iobase;
#include <asm/byteorder.h>
static struct clk *sti_ck;
-unsigned long sti_base, sti_channel_base;
+void __iomem *sti_base, *sti_channel_base;
static unsigned long sti_kern_mask = STIEn;
static unsigned long sti_irq_mask = STI_IRQSTATUS_MASK;
static DEFINE_SPINLOCK(sti_lock);
static int __devinit sti_probe(struct platform_device *pdev)
{
struct resource *res, *cres;
+ unsigned int size;
int ret;
if (pdev->num_resources != 3) {
if (unlikely(ret != 0))
goto err;
- sti_base = io_p2v(res->start);
+ size = res->end - res->start + 1;
+ sti_base = ioremap(res->start, size);
+ if (!sti_base) {
+ ret = -ENOMEM;
+ goto err_badremap;
+ }
- /*
- * OMAP 16xx keeps channels in a relatively sane location,
- * whereas 24xx maps them much further out, and so they must be
- * remapped.
- */
- if (cpu_is_omap16xx())
- sti_channel_base = io_p2v(cres->start);
- else if (cpu_is_omap24xx()) {
- unsigned int size = cres->end - cres->start;
-
- sti_channel_base = (unsigned long)ioremap(cres->start, size);
- if (unlikely(!sti_channel_base)) {
- ret = -ENODEV;
- goto err_badremap;
- }
+ size = cres->end - cres->start + 1;
+ sti_channel_base = ioremap(cres->start, size);
+ if (!sti_channel_base) {
+ iounmap(sti_base);
+ ret = -ENOMEM;
+ goto err_badremap;
}
ret = request_irq(platform_get_irq(pdev, 0), sti_interrupt,
return sti_init();
err_badirq:
- iounmap((void *)sti_channel_base);
+ iounmap(sti_channel_base);
+ iounmap(sti_base);
err_badremap:
device_remove_file(&pdev->dev, &dev_attr_imask);
err:
{
unsigned int irq = platform_get_irq(pdev, 0);
- if (cpu_is_omap24xx())
- iounmap((void *)sti_channel_base);
+ iounmap(sti_channel_base);
+ iounmap(sti_base);
device_remove_file(&pdev->dev, &dev_attr_trace);
device_remove_file(&pdev->dev, &dev_attr_imask);
static struct clk *omap_nand_clk;
static int omap_nand_dma_ch;
static struct completion omap_nand_dma_comp;
-static unsigned long omap_nand_base = io_p2v(NAND_BASE);
+static unsigned long omap_nand_base = OMAP1_IO_ADDRESS(NAND_BASE);
static inline u32 nand_read_reg(int idx)
{