[ARM] 4299/1: S3C AC97 fill in register bit defines

Create defines in the same styles as other s3c include files
giving names to bits in registers within the AC97 IO unit.

Signed-off-by: Graeme Gregory <gg@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/include/asm-arm/arch-s3c2410/regs-ac97.h b/include/asm-arm/arch-s3c2410/regs-ac97.h
index bdd6a4f93d7ffdcca577149424362d9cccb7acce..b004dee6bcafa6f9599d75f3f77242988ef3afd9 100644 (file)
--- a/include/asm-arm/arch-s3c2410/regs-ac97.h
+++ b/include/asm-arm/arch-s3c2410/regs-ac97.h
@@ -13,11 +13,55 @@
 #ifndef __ASM_ARCH_REGS_AC97_H
 #define __ASM_ARCH_REGS_AC97_H __FILE__
 
-#define S3C_AC97_GLBCTRL       (0x00)
-#define S3C_AC97_GLBSTAT       (0x04)
-#define S3C_AC97_CODEC_CMD     (0x08)
-#define S3C_AC97_PCM_ADDR      (0x10)
-#define S3C_AC97_PCM_DATA      (0x18)
-#define S3C_AC97_MIC_DATA      (0x1C)
+#define S3C_AC97_GLBCTRL                               (0x00)
+
+#define S3C_AC97_GLBCTRL_CODECREADYIE                  (1<<22)
+#define S3C_AC97_GLBCTRL_PCMOUTURIE                    (1<<21)
+#define S3C_AC97_GLBCTRL_PCMINORIE                     (1<<20)
+#define S3C_AC97_GLBCTRL_MICINORIE                     (1<<19)
+#define S3C_AC97_GLBCTRL_PCMOUTTIE                     (1<<18)
+#define S3C_AC97_GLBCTRL_PCMINTIE                      (1<<17)
+#define S3C_AC97_GLBCTRL_MICINTIE                      (1<<16)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_OFF                  (0<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_PIO                  (1<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_DMA                  (2<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_MASK                 (3<<12)
+#define S3C_AC97_GLBCTRL_PCMINTM_OFF                   (0<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_PIO                   (1<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_DMA                   (2<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_MASK                  (3<<10)
+#define S3C_AC97_GLBCTRL_MICINTM_OFF                   (0<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_PIO                   (1<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_DMA                   (2<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_MASK                  (3<<8)
+#define S3C_AC97_GLBCTRL_TRANSFERDATAENABLE            (1<<3)
+#define S3C_AC97_GLBCTRL_ACLINKON                      (1<<2)
+#define S3C_AC97_GLBCTRL_WARMRESET                     (1<<1)
+#define S3C_AC97_GLBCTRL_COLDRESET                     (1<<0)
+
+#define S3C_AC97_GLBSTAT                               (0x04)
+
+#define S3C_AC97_GLBSTAT_CODECREADY                    (1<<22)
+#define S3C_AC97_GLBSTAT_PCMOUTUR                      (1<<21)
+#define S3C_AC97_GLBSTAT_PCMINORI                      (1<<20)
+#define S3C_AC97_GLBSTAT_MICINORI                      (1<<19)
+#define S3C_AC97_GLBSTAT_PCMOUTTI                      (1<<18)
+#define S3C_AC97_GLBSTAT_PCMINTI                       (1<<17)
+#define S3C_AC97_GLBSTAT_MICINTI                       (1<<16)
+#define S3C_AC97_GLBSTAT_MAINSTATE_IDLE                        (0<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_INIT                        (1<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_READY               (2<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE              (3<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_LP                  (4<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_WARM                        (5<<0)
+
+#define S3C_AC97_CODEC_CMD                             (0x08)
+
+#define S3C_AC97_CODEC_CMD_READ                                (1<<23)
+
+#define S3C_AC97_STAT                                  (0x0c)
+#define S3C_AC97_PCM_ADDR                              (0x10)
+#define S3C_AC97_PCM_DATA                              (0x18)
+#define S3C_AC97_MIC_DATA                              (0x1C)
 
 #endif /* __ASM_ARCH_REGS_AC97_H */