[MIPS] Hack for SB1 cache issues

Removing flush_icache_page a while ago broke SB1 which was using an empty
flush_data_cache_page function.  This glues things well enough so a more
efficient but also more intrusive solution can be found later.

Signed-Off-By: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
index d0ddb4a768a50e6d13e30fea902f1b0d36358040..3a8afd47feaab8b3f1e98e5be73b563acd612282 100644 (file)
--- a/arch/mips/mm/c-sb1.c
+++ b/arch/mips/mm/c-sb1.c
@@ -19,6 +19,7 @@
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  */
 #include <linux/init.h>
+#include <linux/hardirq.h>
 
 #include <asm/asm.h>
 #include <asm/bootinfo.h>
@@ -242,6 +243,25 @@ void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsign
        __attribute__((alias("local_sb1_flush_cache_page")));
 #endif
 
+#ifdef CONFIG_SMP
+static void sb1_flush_cache_data_page_ipi(void *info)
+{
+       unsigned long start = (unsigned long)info;
+
+       __sb1_writeback_inv_dcache_range(start, start + PAGE_SIZE);
+}
+
+static void sb1_flush_cache_data_page(unsigned long addr)
+{
+       if (in_atomic())
+               __sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE);
+       else
+               on_each_cpu(sb1_flush_cache_data_page_ipi, (void *) addr, 1, 1);
+}
+#else
+void sb1_flush_cache_data_page(unsigned long)
+       __attribute__((alias("local_sb1_flush_cache_data_page")));
+#endif
 
 /*
  * Invalidate all caches on this CPU
@@ -481,7 +501,7 @@ void sb1_cache_init(void)
 
        flush_cache_sigtramp = sb1_flush_cache_sigtramp;
        local_flush_data_cache_page = (void *) sb1_nop;
-       flush_data_cache_page = (void *) sb1_nop;
+       flush_data_cache_page = sb1_flush_cache_data_page;
 
        /* Full flush */
        __flush_cache_all = sb1___flush_cache_all;