]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
iwlwifi: cleanup PCI register handling
authorTomas Winkler <tomas.winkler@intel.com>
Wed, 3 Sep 2008 03:26:49 +0000 (11:26 +0800)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 8 Sep 2008 18:23:19 +0000 (14:23 -0400)
This patch cleans up pci registers handling.

Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Zhu Yi <yi.zhu@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/iwlwifi/iwl-4965-hw.h
drivers/net/wireless/iwlwifi/iwl-4965.c
drivers/net/wireless/iwlwifi/iwl-5000.c
drivers/net/wireless/iwlwifi/iwl-agn.c
drivers/net/wireless/iwlwifi/iwl-commands.h
drivers/net/wireless/iwlwifi/iwl-power.c

index fce950f4163c16327321118fb13fff7a6e86ad9a..f4793a609443eca52ded350777ea0f0967deb130 100644 (file)
 #define IWL_RSSI_OFFSET        44
 
 
-#include "iwl-commands.h"
 
 /* PCI registers */
-#define PCI_LINK_CTRL      0x0F0       /* 1 byte */
-#define PCI_POWER_SOURCE   0x0C8
-#define PCI_REG_WUM8       0x0E8
+#define PCI_CFG_RETRY_TIMEOUT  0x041
+#define PCI_CFG_POWER_SOURCE   0x0C8
+#define PCI_REG_WUM8           0x0E8
+#define PCI_CFG_LINK_CTRL      0x0F0
 
 /* PCI register values */
-#define PCI_LINK_VAL_L0S_EN    0x01
-#define PCI_LINK_VAL_L1_EN     0x02
+#define PCI_CFG_LINK_CTRL_VAL_L0S_EN   0x01
+#define PCI_CFG_LINK_CTRL_VAL_L1_EN    0x02
+#define PCI_CFG_CMD_REG_INT_DIS_MSK    0x04
 #define PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT         (0x80000000)
 
 #define TFD_QUEUE_SIZE_MAX      (256)
index e2581229d8b2b6e6ac68a58f5ae20d001475b50e..46e076af8f7ef1d9bbeaf6af9e69c106ec29aad9 100644 (file)
@@ -399,7 +399,7 @@ static void iwl4965_nic_config(struct iwl_priv *priv)
        unsigned long flags;
        u32 val;
        u16 radio_cfg;
-       u8 val_link;
+       u16 link;
 
        spin_lock_irqsave(&priv->lock, flags);
 
@@ -410,10 +410,10 @@ static void iwl4965_nic_config(struct iwl_priv *priv)
                                       val & ~(1 << 11));
        }
 
-       pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
+       pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
 
        /* L1 is enabled by BIOS */
-       if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
+       if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
                /* diable L0S disabled L1A enabled */
                iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
        else
index 8b6a72949ac011af5d930cc94f1bea88097b0142..ef9d3399dfd2dea20e25c66af32650f34e27b629 100644 (file)
@@ -208,14 +208,14 @@ static void iwl5000_nic_config(struct iwl_priv *priv)
 {
        unsigned long flags;
        u16 radio_cfg;
-       u8 val_link;
+       u16 link;
 
        spin_lock_irqsave(&priv->lock, flags);
 
-       pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
+       pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
 
        /* L1 is enabled by BIOS */
-       if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
+       if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
                /* diable L0S disabled L1A enabled */
                iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
        else
index ffaf3f2e8a9ebe041588e21b66649a08af6e644f..250473138f30f7194c7f698dc418caa99909aa76 100644 (file)
@@ -1273,7 +1273,7 @@ int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 
        if (src == IWL_PWR_SRC_VAUX) {
                u32 val;
-               ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
+               ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
                                            &val);
 
                if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
@@ -4229,9 +4229,6 @@ static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
 
        pci_set_drvdata(pdev, priv);
 
-       /* We disable the RETRY_TIMEOUT register (0x41) to keep
-        * PCI Tx retries from interfering with C3 CPU state */
-       pci_write_config_byte(pdev, 0x41, 0x00);
 
        /***********************
         * 3. Read REV register
@@ -4251,6 +4248,10 @@ static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
                ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
                priv->cfg->name, priv->hw_rev);
 
+       /* We disable the RETRY_TIMEOUT register (0x41) to keep
+        * PCI Tx retries from interfering with C3 CPU state */
+       pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
+
        /* amp init */
        err = priv->cfg->ops->lib->apm_ops.init(priv);
        if (err < 0) {
index 28b5b09996ed25dee442003e4cf2a8bee1f18ba2..fbd8cc1f51df6c30b63db2bf21b0facf27c2278b 100644 (file)
@@ -2026,8 +2026,8 @@ struct iwl4965_spectrum_notification {
  *   bit 2 - '0' PM have to walk up every DTIM
  *           '1' PM could sleep over DTIM till listen Interval.
  * PCI power managed
- *   bit 3 - '0' (PCI_LINK_CTRL & 0x1)
- *           '1' !(PCI_LINK_CTRL & 0x1)
+ *   bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
+ *           '1' !(PCI_CFG_LINK_CTRL & 0x1)
  * Force sleep Modes
  *   bit 31/30- '00' use both mac/xtal sleeps
  *              '01' force Mac sleep
index a099c9e30e55dcdfe0d933a3e64c4947719bd593..eb6312d867d133c67e18ddd6b4592b9b648122c4 100644 (file)
@@ -152,9 +152,10 @@ static u16 iwl_get_auto_power_mode(struct iwl_priv *priv)
 /* initialize to default */
 static int iwl_power_init_handle(struct iwl_priv *priv)
 {
-       int ret = 0, i;
        struct iwl_power_mgr *pow_data;
        int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX;
+       struct iwl_powertable_cmd *cmd;
+       int i;
        u16 pci_pm;
 
        IWL_DEBUG_POWER("Initialize power \n");
@@ -167,25 +168,19 @@ static int iwl_power_init_handle(struct iwl_priv *priv)
        memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
        memcpy(&pow_data->pwr_range_2[0], &range_2[0], size);
 
-       ret = pci_read_config_word(priv->pci_dev,
-                                 PCI_LINK_CTRL, &pci_pm);
-       if (ret != 0)
-               return 0;
-       else {
-               struct iwl_powertable_cmd *cmd;
+       pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &pci_pm);
 
-               IWL_DEBUG_POWER("adjust power command flags\n");
+       IWL_DEBUG_POWER("adjust power command flags\n");
 
-               for (i = 0; i < IWL_POWER_MAX; i++) {
-                       cmd = &pow_data->pwr_range_0[i].cmd;
+       for (i = 0; i < IWL_POWER_MAX; i++) {
+               cmd = &pow_data->pwr_range_0[i].cmd;
 
-                       if (pci_pm & 0x1)
-                               cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
-                       else
-                               cmd->flags |= IWL_POWER_PCI_PM_MSK;
-               }
+               if (pci_pm & PCI_CFG_LINK_CTRL_VAL_L0S_EN)
+                       cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
+               else
+                       cmd->flags |= IWL_POWER_PCI_PM_MSK;
        }
-       return ret;
+       return 0;
 }
 
 /* adjust power command according to dtim period and power level*/