#ifndef CONFIG_GENERIC_TIME
 void do_gettimeofday(struct timeval *tv)
 {
+       unsigned long flags;
        unsigned long seq;
        unsigned long usec, sec;
 
        do {
-               seq = read_seqbegin(&xtime_lock);
+               /*
+                * Turn off IRQs when grabbing xtime_lock, so that
+                * the sys_timer get_offset code doesn't have to handle it.
+                */
+               seq = read_seqbegin_irqsave(&xtime_lock, flags);
                usec = get_timer_offset();
                sec = xtime.tv_sec;
-               usec += xtime.tv_nsec / 1000;
-       } while (read_seqretry(&xtime_lock, seq));
+               usec += xtime.tv_nsec / NSEC_PER_USEC;
+       } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
 
        while (usec >= 1000000) {
                usec -= 1000000;
         * wall time.  Discover what correction gettimeofday() would have
         * made, and then undo it!
         */
-       nsec -= 1000 * get_timer_offset();
+       nsec -= get_timer_offset() * NSEC_PER_USEC;
 
        wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
        wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
 
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
-#include <linux/spinlock.h>
 #include <linux/seqlock.h>
 #include <asm/timer.h>
 #include <asm/rtc.h>
 #error "Unknown CPU SUBTYPE"
 #endif
 
-static DEFINE_SPINLOCK(cmt0_lock);
-
 static unsigned long cmt_timer_get_offset(void)
 {
        int count;
-       unsigned long flags;
-
        static unsigned short count_p = 0xffff;    /* for the first call after boot */
        static unsigned long jiffies_p = 0;
 
         */
        unsigned long jiffies_t;
 
-       spin_lock_irqsave(&cmt0_lock, flags);
        /* timer count may underflow right here */
        count =  ctrl_inw(CMT_CMCOR_0);
        count -= ctrl_inw(CMT_CMCNT_0);
                jiffies_p = jiffies_t;
 
        count_p = count;
-       spin_unlock_irqrestore(&cmt0_lock, flags);
 
        count = ((LATCH-1) - count) * TICK_SIZE;
        count = (count + LATCH/2) / LATCH;
 static struct irqaction cmt_irq = {
        .name           = "timer",
        .handler        = cmt_timer_interrupt,
-       .flags          = IRQF_DISABLED,
+       .flags          = IRQF_DISABLED | IRQF_TIMER,
        .mask           = CPU_MASK_NONE,
 };
 
 
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
-#include <linux/spinlock.h>
 #include <linux/seqlock.h>
 #include <asm/timer.h>
 #include <asm/io.h>
  * However, we can implement channel cascade if we go the overflow route and
  * get away with using 2 MTU2 channels as a 32-bit timer.
  */
-
-static DEFINE_SPINLOCK(mtu2_lock);
-
 #define MTU2_TSTR      0xfffe4280
 #define MTU2_TCR_1     0xfffe4380
 #define MTU2_TMDR_1    0xfffe4381
 static unsigned long mtu2_timer_get_offset(void)
 {
        int count;
-       unsigned long flags;
-
        static int count_p = 0x7fff;    /* for the first call after boot */
        static unsigned long jiffies_p = 0;
 
         */
        unsigned long jiffies_t;
 
-       spin_lock_irqsave(&mtu2_lock, flags);
        /* timer count may underflow right here */
        count = ctrl_inw(MTU2_TCNT_1);  /* read the latched count */
 
                jiffies_p = jiffies_t;
 
        count_p = count;
-       spin_unlock_irqrestore(&mtu2_lock, flags);
 
        count = ((LATCH-1) - count) * TICK_SIZE;
        count = (count + LATCH/2) / LATCH;
 static struct irqaction mtu2_irq = {
        .name           = "timer",
        .handler        = mtu2_timer_interrupt,
-       .flags          = IRQF_DISABLED,
+       .flags          = IRQF_DISABLED | IRQF_TIMER,
        .mask           = CPU_MASK_NONE,
 };
 
 
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
-#include <linux/spinlock.h>
 #include <linux/seqlock.h>
 #include <asm/timer.h>
 #include <asm/rtc.h>
 
 #define TMU0_TCR_CALIB 0x0000
 
-static DEFINE_SPINLOCK(tmu0_lock);
-
 static unsigned long tmu_timer_get_offset(void)
 {
        int count;
-       unsigned long flags;
-
        static int count_p = 0x7fffffff;    /* for the first call after boot */
        static unsigned long jiffies_p = 0;
 
         */
        unsigned long jiffies_t;
 
-       spin_lock_irqsave(&tmu0_lock, flags);
        /* timer count may underflow right here */
        count = ctrl_inl(TMU0_TCNT);    /* read the latched count */
 
                jiffies_p = jiffies_t;
 
        count_p = count;
-       spin_unlock_irqrestore(&tmu0_lock, flags);
 
        count = ((LATCH-1) - count) * TICK_SIZE;
        count = (count + LATCH/2) / LATCH;
 static struct irqaction tmu_irq = {
        .name           = "timer",
        .handler        = tmu_timer_interrupt,
-       .flags          = IRQF_DISABLED,
+       .flags          = IRQF_DISABLED | IRQF_TIMER,
        .mask           = CPU_MASK_NONE,
 };